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/Linux-v6.6/tools/perf/pmu-events/arch/x86/graniterapids/
Dmemory.json3 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
10 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency
15 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
22 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency
27 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
34 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency
39 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
46 …ds when the latency from first dispatch to completion is greater than 32 cycles. Reported latency
51 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
58 …ds when the latency from first dispatch to completion is greater than 4 cycles. Reported latency
[all …]
/Linux-v6.6/arch/arm/boot/dts/nvidia/
Dtegra30-cpu-opp.dtsi9 clock-latency-ns = <100000>;
15 clock-latency-ns = <100000>;
21 clock-latency-ns = <100000>;
27 clock-latency-ns = <100000>;
33 clock-latency-ns = <100000>;
39 clock-latency-ns = <100000>;
45 clock-latency-ns = <100000>;
52 clock-latency-ns = <100000>;
59 clock-latency-ns = <100000>;
66 clock-latency-ns = <100000>;
[all …]
Dtegra20-cpu-opp.dtsi9 clock-latency-ns = <400000>;
16 clock-latency-ns = <400000>;
23 clock-latency-ns = <400000>;
29 clock-latency-ns = <400000>;
35 clock-latency-ns = <400000>;
41 clock-latency-ns = <400000>;
48 clock-latency-ns = <400000>;
54 clock-latency-ns = <400000>;
60 clock-latency-ns = <400000>;
66 clock-latency-ns = <400000>;
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/Linux-v6.6/arch/sh/lib/
Dmemcpy-sh4.S31 mov r4,r2 ! 5 MT (0 cycles latency)
33 mov.l @(r0,r5),r7 ! 21 LS (2 cycles latency)
40 3: mov.l @(r0,r5),r1 ! 21 LS (latency=2) ! NMLK
41 mov r7, r3 ! 5 MT (latency=0) ! RQPO
46 mov r1,r6 ! 5 MT (latency=0)
50 mov r1, r7 ! 5 MT (latency=0)
57 3: mov.l @(r0,r5),r1 ! 21 LS (latency=2) ! KLMN
58 mov r7,r3 ! 5 MT (latency=0) ! OPQR
64 mov r1,r6 ! 5 MT (latency=0)
67 mov r1,r7 ! 5 MT (latency=0)
[all …]
/Linux-v6.6/arch/arm64/boot/dts/qcom/
Dmsm8996pro.dtsi26 clock-latency-ns = <200000>;
32 clock-latency-ns = <200000>;
38 clock-latency-ns = <200000>;
44 clock-latency-ns = <200000>;
50 clock-latency-ns = <200000>;
56 clock-latency-ns = <200000>;
62 clock-latency-ns = <200000>;
68 clock-latency-ns = <200000>;
74 clock-latency-ns = <200000>;
80 clock-latency-ns = <200000>;
[all …]
/Linux-v6.6/tools/perf/pmu-events/arch/x86/meteorlake/
Dmemory.json124 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
131 …s when the latency from first dispatch to completion is greater than 1024 cycles. Reported latenc…
137 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
144 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency
150 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
157 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency
163 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
170 …s when the latency from first dispatch to completion is greater than 2048 cycles. Reported latenc…
176 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
183 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency
[all …]
/Linux-v6.6/tools/perf/pmu-events/arch/x86/tigerlake/
Dmemory.json19 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
26 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency
31 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
38 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency
43 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
50 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency
55 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
62 …ds when the latency from first dispatch to completion is greater than 32 cycles. Reported latency
67 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
74 …ds when the latency from first dispatch to completion is greater than 4 cycles. Reported latency
[all …]
/Linux-v6.6/Documentation/devicetree/bindings/cpu/
Didle-states.yaml44 Idle state parameters (e.g. entry latency) are platform specific and need to
81 | latency |
83 | latency |
85 |<------- wakeup-latency ------->|
93 event conditions. The abort latency is assumed to be negligible
107 entry-latency: Worst case latency required to enter the idle state. The
108 exit-latency may be guaranteed only after entry-latency has passed.
113 wakeup-latency: Maximum delay between the signaling of a wake-up event and the
115 to be entry-latency + exit-latency.
127 wakeup-delay = exit-latency + max(entry-latency - (now - entry-timestamp), 0)
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/Linux-v6.6/tools/perf/pmu-events/arch/x86/alderlake/
Dmemory.json116 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
123 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency
129 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
136 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency
142 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
149 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency
155 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
162 …ds when the latency from first dispatch to completion is greater than 32 cycles. Reported latency
168 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
175 …ds when the latency from first dispatch to completion is greater than 4 cycles. Reported latency
[all …]
/Linux-v6.6/Documentation/power/
Dpm_qos_interface.rst10 * CPU latency QoS.
12 per-device latency constraints and PM QoS flags.
14 The latency unit used in the PM QoS framework is the microsecond (usec).
20 A global list of CPU latency QoS requests is maintained along with an aggregated
22 to the request list or elements of the list. For CPU latency QoS, the
32 Will insert an element into the CPU latency QoS list with the target value.
49 Returns the aggregated value for the CPU latency QoS.
53 CPU latency QoS list.
56 Adds a notification callback function to the CPU latency QoS. The callback is
57 called when the aggregated value for the CPU latency QoS is changed.
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/Linux-v6.6/tools/perf/pmu-events/arch/x86/sapphirerapids/
Dmemory.json53 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
60 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency
65 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
72 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency
77 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
84 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency
89 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
96 …ds when the latency from first dispatch to completion is greater than 32 cycles. Reported latency
101 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
108 …ds when the latency from first dispatch to completion is greater than 4 cycles. Reported latency
[all …]
/Linux-v6.6/kernel/
Dlatencytop.c3 * latencytop.c: Latency display infrastructure
10 * CONFIG_LATENCYTOP enables a kernel latency tracking infrastructure that is
11 * used by the "latencytop" userspace tool. The latency that is tracked is not
12 * the 'traditional' interrupt latency (which is primarily caused by something
13 * else consuming CPU), but instead, it is the latency an application encounters
17 * 1) System level latency
18 * 2) Per process latency
20 * The latency is stored in fixed sized data structures in an accumulated form;
21 * if the "same" latency cause is hit twice, this will be tracked as one entry
22 * in the data structure. Both the count, total accumulated latency and maximum
[all …]
/Linux-v6.6/tools/perf/pmu-events/arch/x86/rocketlake/
Dmemory.json75 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
82 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency
87 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
94 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency
99 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
106 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency
111 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
118 …ds when the latency from first dispatch to completion is greater than 32 cycles. Reported latency
123 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
130 …ds when the latency from first dispatch to completion is greater than 4 cycles. Reported latency
[all …]
/Linux-v6.6/tools/perf/pmu-events/arch/x86/icelake/
Dmemory.json75 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
82 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency
87 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
94 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency
99 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
106 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency
111 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
118 …ds when the latency from first dispatch to completion is greater than 32 cycles. Reported latency
123 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
130 …ds when the latency from first dispatch to completion is greater than 4 cycles. Reported latency
[all …]
/Linux-v6.6/tools/perf/pmu-events/arch/x86/ivybridge/
Dmemory.json10 "BriefDescription": "Loads with latency value being above 128",
16 "PublicDescription": "Loads with latency value being above 128.",
21 "BriefDescription": "Loads with latency value being above 16",
27 "PublicDescription": "Loads with latency value being above 16.",
32 "BriefDescription": "Loads with latency value being above 256",
38 "PublicDescription": "Loads with latency value being above 256.",
43 "BriefDescription": "Loads with latency value being above 32",
49 "PublicDescription": "Loads with latency value being above 32.",
54 "BriefDescription": "Loads with latency value being above 4",
60 "PublicDescription": "Loads with latency value being above 4.",
[all …]
/Linux-v6.6/tools/perf/pmu-events/arch/x86/icelakex/
Dmemory.json19 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
26 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency
31 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
38 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency
43 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
50 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency
55 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
62 …ds when the latency from first dispatch to completion is greater than 32 cycles. Reported latency
67 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
74 …ds when the latency from first dispatch to completion is greater than 4 cycles. Reported latency
[all …]
/Linux-v6.6/drivers/char/tpm/st33zp24/
Dspi.c41 * Between command and response, there are latency byte (up to 15
47 * some latency byte before the answer is available (max 15).
60 int latency; member
119 memset(&phy->tx_buf[total_length], TPM_DUMMY_BYTE, phy->latency); in st33zp24_spi_send()
121 spi_xfer.len = total_length + phy->latency; in st33zp24_spi_send()
125 ret = phy->rx_buf[total_length + phy->latency - 1]; in st33zp24_spi_send()
155 phy->latency + tpm_size); in st33zp24_spi_read8_reg()
157 spi_xfer.len = total_length + phy->latency + tpm_size; in st33zp24_spi_read8_reg()
162 ret = phy->rx_buf[total_length + phy->latency - 1]; in st33zp24_spi_read8_reg()
164 memcpy(tpm_data, phy->rx_buf + total_length + phy->latency, in st33zp24_spi_read8_reg()
[all …]
/Linux-v6.6/arch/arm/boot/dts/samsung/
Dexynos4212.dtsi65 clock-latency-ns = <200000>;
70 clock-latency-ns = <200000>;
75 clock-latency-ns = <200000>;
80 clock-latency-ns = <200000>;
85 clock-latency-ns = <200000>;
90 clock-latency-ns = <200000>;
95 clock-latency-ns = <200000>;
101 clock-latency-ns = <200000>;
106 clock-latency-ns = <200000>;
111 clock-latency-ns = <200000>;
[all …]
Dexynos4412.dtsi91 clock-latency-ns = <200000>;
96 clock-latency-ns = <200000>;
101 clock-latency-ns = <200000>;
106 clock-latency-ns = <200000>;
111 clock-latency-ns = <200000>;
116 clock-latency-ns = <200000>;
121 clock-latency-ns = <200000>;
127 clock-latency-ns = <200000>;
132 clock-latency-ns = <200000>;
137 clock-latency-ns = <200000>;
[all …]
Dexynos5800.dtsi27 clock-latency-ns = <140000>;
32 clock-latency-ns = <140000>;
37 clock-latency-ns = <140000>;
75 clock-latency-ns = <140000>;
80 clock-latency-ns = <140000>;
85 clock-latency-ns = <140000>;
90 clock-latency-ns = <140000>;
95 clock-latency-ns = <140000>;
103 clock-latency-ns = <140000>;
132 clock-latency-ns = <140000>;
[all …]
/Linux-v6.6/Documentation/devicetree/bindings/power/
Ddomain-idle-state.yaml31 entry-latency-us:
33 The worst case latency in microseconds required to enter the idle
34 state. Note that, the exit-latency-us duration may be guaranteed only
35 after the entry-latency-us has passed.
37 exit-latency-us:
39 The worst case latency in microseconds required to exit the idle
59 - entry-latency-us
60 - exit-latency-us
71 entry-latency-us = <20>;
72 exit-latency-us = <40>;
/Linux-v6.6/tools/perf/pmu-events/arch/powerpc/power8/
Dmetrics.json744 …tion": "estimate of dl2l3 distant MOD miss rates with measured DL2L3 MOD latency as a %of dcache m…
750 …tion": "estimate of dl2l3 distant SHR miss rates with measured DL2L3 SHR latency as a %of dcache m…
756 …"BriefDescription": "estimate of distant L4 miss rates with measured DL4 latency as a %of dcache m…
762 …"BriefDescription": "estimate of distant memory miss rates with measured DMEM latency as a %of dca…
768 …"BriefDescription": "estimate of dl21 MOD miss rates with measured L21 MOD latency as a %of dcache…
774 …"BriefDescription": "estimate of dl21 SHR miss rates with measured L21 SHR latency as a %of dcache…
780 …"BriefDescription": "estimate of dl2 miss rates with measured L2 latency as a %of dcache miss cpi",
786 …"BriefDescription": "estimate of dl31 MOD miss rates with measured L31 MOD latency as a %of dcache…
792 …"BriefDescription": "estimate of dl31 SHR miss rates with measured L31 SHR latency as a %of dcache…
798 …"BriefDescription": "estimate of dl3 miss rates with measured L3 latency as a % of dcache miss cpi…
[all …]
/Linux-v6.6/Documentation/devicetree/bindings/cache/
Dbaikal,bt1-l2-ctl.yaml27 baikal,l2-ws-latency:
29 description: Cycles of latency for Way-select RAM accesses
34 baikal,l2-tag-latency:
36 description: Cycles of latency for Tag RAM accesses
41 baikal,l2-data-latency:
43 description: Cycles of latency for Data RAM accesses
59 baikal,l2-ws-latency = <1>;
60 baikal,l2-tag-latency = <1>;
61 baikal,l2-data-latency = <2>;
/Linux-v6.6/tools/perf/pmu-events/arch/x86/alderlaken/
Dcache.json155 …"BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or…
162latency that exceeds or equals the threshold of 128 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESH…
167 …"BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or…
174latency that exceeds or equals the threshold of 16 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESHO…
179 …"BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or…
186latency that exceeds or equals the threshold of 256 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESH…
191 …"BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or…
198latency that exceeds or equals the threshold of 32 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESHO…
203 …"BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or…
210latency that exceeds or equals the threshold of 4 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESHOL…
[all …]
/Linux-v6.6/drivers/gpu/drm/i915/display/
Dintel_wm.c24 * lines), so need to account for TLB latency
27 * watermark = dotclock * bytes per pixel * latency
28 * where latency is platform & configuration dependent (we assume pessimal
32 * watermark = (trunc(latency/line time)+1) * surface width *
37 * and latency is assumed to be high, as above.
152 unsigned int latency = wm[level]; in intel_print_wm_latency() local
154 if (latency == 0) { in intel_print_wm_latency()
156 "%s WM%d latency not provided\n", in intel_print_wm_latency()
163 * - before then, WM1+ latency values are in 0.5us units in intel_print_wm_latency()
166 latency *= 10; in intel_print_wm_latency()
[all …]

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