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/Linux-v6.1/arch/arm/boot/dts/
Dtegra30-cpu-opp.dtsi9 clock-latency-ns = <100000>;
15 clock-latency-ns = <100000>;
21 clock-latency-ns = <100000>;
27 clock-latency-ns = <100000>;
33 clock-latency-ns = <100000>;
39 clock-latency-ns = <100000>;
45 clock-latency-ns = <100000>;
52 clock-latency-ns = <100000>;
59 clock-latency-ns = <100000>;
66 clock-latency-ns = <100000>;
[all …]
Dtegra20-cpu-opp.dtsi9 clock-latency-ns = <400000>;
16 clock-latency-ns = <400000>;
23 clock-latency-ns = <400000>;
29 clock-latency-ns = <400000>;
35 clock-latency-ns = <400000>;
41 clock-latency-ns = <400000>;
48 clock-latency-ns = <400000>;
54 clock-latency-ns = <400000>;
60 clock-latency-ns = <400000>;
66 clock-latency-ns = <400000>;
[all …]
Dexynos5800.dtsi27 clock-latency-ns = <140000>;
32 clock-latency-ns = <140000>;
37 clock-latency-ns = <140000>;
75 clock-latency-ns = <140000>;
80 clock-latency-ns = <140000>;
85 clock-latency-ns = <140000>;
90 clock-latency-ns = <140000>;
95 clock-latency-ns = <140000>;
103 clock-latency-ns = <140000>;
132 clock-latency-ns = <140000>;
[all …]
Dmstar-infinity3.dtsi13 clock-latency-ns = <300000>;
20 clock-latency-ns = <300000>;
27 clock-latency-ns = <300000>;
34 clock-latency-ns = <300000>;
41 clock-latency-ns = <300000>;
48 clock-latency-ns = <300000>;
55 clock-latency-ns = <300000>;
62 clock-latency-ns = <300000>;
/Linux-v6.1/arch/sh/lib/
Dmemcpy-sh4.S31 mov r4,r2 ! 5 MT (0 cycles latency)
33 mov.l @(r0,r5),r7 ! 21 LS (2 cycles latency)
40 3: mov.l @(r0,r5),r1 ! 21 LS (latency=2) ! NMLK
41 mov r7, r3 ! 5 MT (latency=0) ! RQPO
46 mov r1,r6 ! 5 MT (latency=0)
50 mov r1, r7 ! 5 MT (latency=0)
57 3: mov.l @(r0,r5),r1 ! 21 LS (latency=2) ! KLMN
58 mov r7,r3 ! 5 MT (latency=0) ! OPQR
64 mov r1,r6 ! 5 MT (latency=0)
67 mov r1,r7 ! 5 MT (latency=0)
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/cpu/
Didle-states.yaml44 Idle state parameters (e.g. entry latency) are platform specific and need to
81 | latency |
83 | latency |
85 |<------- wakeup-latency ------->|
93 event conditions. The abort latency is assumed to be negligible
107 entry-latency: Worst case latency required to enter the idle state. The
108 exit-latency may be guaranteed only after entry-latency has passed.
113 wakeup-latency: Maximum delay between the signaling of a wake-up event and the
115 to be entry-latency + exit-latency.
127 wakeup-delay = exit-latency + max(entry-latency - (now - entry-timestamp), 0)
[all …]
/Linux-v6.1/Documentation/power/
Dpm_qos_interface.rst10 * CPU latency QoS.
12 per-device latency constraints and PM QoS flags.
14 The latency unit used in the PM QoS framework is the microsecond (usec).
20 A global list of CPU latency QoS requests is maintained along with an aggregated
22 to the request list or elements of the list. For CPU latency QoS, the
32 Will insert an element into the CPU latency QoS list with the target value.
49 Returns the aggregated value for the CPU latency QoS.
53 CPU latency QoS list.
56 Adds a notification callback function to the CPU latency QoS. The callback is
57 called when the aggregated value for the CPU latency QoS is changed.
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/tigerlake/
Dmemory.json25 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
35 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency
41 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
51 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency
57 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
67 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency
73 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
83 …ds when the latency from first dispatch to completion is greater than 32 cycles. Reported latency
89 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
99 …ds when the latency from first dispatch to completion is greater than 4 cycles. Reported latency
[all …]
/Linux-v6.1/kernel/
Dlatencytop.c3 * latencytop.c: Latency display infrastructure
10 * CONFIG_LATENCYTOP enables a kernel latency tracking infrastructure that is
11 * used by the "latencytop" userspace tool. The latency that is tracked is not
12 * the 'traditional' interrupt latency (which is primarily caused by something
13 * else consuming CPU), but instead, it is the latency an application encounters
17 * 1) System level latency
18 * 2) Per process latency
20 * The latency is stored in fixed sized data structures in an accumulated form;
21 * if the "same" latency cause is hit twice, this will be tracked as one entry
22 * in the data structure. Both the count, total accumulated latency and maximum
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/sapphirerapids/
Dmemory.json75 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
85 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency
91 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
101 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency
107 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
117 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency
123 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
133 …ds when the latency from first dispatch to completion is greater than 32 cycles. Reported latency
139 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
149 …ds when the latency from first dispatch to completion is greater than 4 cycles. Reported latency
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/power/
Ddomain-idle-state.yaml31 entry-latency-us:
33 The worst case latency in microseconds required to enter the idle
34 state. Note that, the exit-latency-us duration may be guaranteed only
35 after the entry-latency-us has passed.
37 exit-latency-us:
39 The worst case latency in microseconds required to exit the idle
59 - entry-latency-us
60 - exit-latency-us
71 entry-latency-us = <20>;
72 exit-latency-us = <40>;
/Linux-v6.1/tools/perf/pmu-events/arch/x86/ivybridge/
Dmemory.json12 "BriefDescription": "Loads with latency value being above 128",
20 "PublicDescription": "Loads with latency value being above 128.",
26 "BriefDescription": "Loads with latency value being above 16",
34 "PublicDescription": "Loads with latency value being above 16.",
40 "BriefDescription": "Loads with latency value being above 256",
48 "PublicDescription": "Loads with latency value being above 256.",
54 "BriefDescription": "Loads with latency value being above 32",
62 "PublicDescription": "Loads with latency value being above 32.",
68 "BriefDescription": "Loads with latency value being above 4",
76 "PublicDescription": "Loads with latency value being above 4.",
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/powerpc/power8/
Dmetrics.json744 …tion": "estimate of dl2l3 distant MOD miss rates with measured DL2L3 MOD latency as a %of dcache m…
750 …tion": "estimate of dl2l3 distant SHR miss rates with measured DL2L3 SHR latency as a %of dcache m…
756 …"BriefDescription": "estimate of distant L4 miss rates with measured DL4 latency as a %of dcache m…
762 …"BriefDescription": "estimate of distant memory miss rates with measured DMEM latency as a %of dca…
768 …"BriefDescription": "estimate of dl21 MOD miss rates with measured L21 MOD latency as a %of dcache…
774 …"BriefDescription": "estimate of dl21 SHR miss rates with measured L21 SHR latency as a %of dcache…
780 …"BriefDescription": "estimate of dl2 miss rates with measured L2 latency as a %of dcache miss cpi",
786 …"BriefDescription": "estimate of dl31 MOD miss rates with measured L31 MOD latency as a %of dcache…
792 …"BriefDescription": "estimate of dl31 SHR miss rates with measured L31 SHR latency as a %of dcache…
798 …"BriefDescription": "estimate of dl3 miss rates with measured L3 latency as a % of dcache miss cpi…
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/memory-controllers/
Dbaikal,bt1-l2-ctl.yaml27 baikal,l2-ws-latency:
29 description: Cycles of latency for Way-select RAM accesses
34 baikal,l2-tag-latency:
36 description: Cycles of latency for Tag RAM accesses
41 baikal,l2-data-latency:
43 description: Cycles of latency for Data RAM accesses
59 baikal,l2-ws-latency = <1>;
60 baikal,l2-tag-latency = <1>;
61 baikal,l2-data-latency = <2>;
/Linux-v6.1/tools/perf/pmu-events/arch/x86/icelake/
Dmemory.json105 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
115 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency
121 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
131 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency
137 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
147 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency
153 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
163 …ds when the latency from first dispatch to completion is greater than 32 cycles. Reported latency
169 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
179 …ds when the latency from first dispatch to completion is greater than 4 cycles. Reported latency
[all …]
/Linux-v6.1/arch/arm64/boot/dts/allwinner/
Dsun50i-h5-cpu-opp.dtsi12 clock-latency-ns = <244144>; /* 8 32k periods */
18 clock-latency-ns = <244144>; /* 8 32k periods */
24 clock-latency-ns = <244144>; /* 8 32k periods */
30 clock-latency-ns = <244144>; /* 8 32k periods */
36 clock-latency-ns = <244144>; /* 8 32k periods */
42 clock-latency-ns = <244144>; /* 8 32k periods */
48 clock-latency-ns = <244144>; /* 8 32k periods */
54 clock-latency-ns = <244144>; /* 8 32k periods */
60 clock-latency-ns = <244144>; /* 8 32k periods */
Dsun50i-a64-cpu-opp.dtsi14 clock-latency-ns = <244144>; /* 8 32k periods */
20 clock-latency-ns = <244144>; /* 8 32k periods */
26 clock-latency-ns = <244144>; /* 8 32k periods */
32 clock-latency-ns = <244144>; /* 8 32k periods */
38 clock-latency-ns = <244144>; /* 8 32k periods */
44 clock-latency-ns = <244144>; /* 8 32k periods */
50 clock-latency-ns = <244144>; /* 8 32k periods */
56 clock-latency-ns = <244144>; /* 8 32k periods */
Dsun50i-h6-cpu-opp.dtsi12 clock-latency-ns = <244144>; /* 8 32k periods */
21 clock-latency-ns = <244144>; /* 8 32k periods */
30 clock-latency-ns = <244144>; /* 8 32k periods */
39 clock-latency-ns = <244144>; /* 8 32k periods */
48 clock-latency-ns = <244144>; /* 8 32k periods */
57 clock-latency-ns = <244144>; /* 8 32k periods */
66 clock-latency-ns = <244144>; /* 8 32k periods */
75 clock-latency-ns = <244144>; /* 8 32k periods */
84 clock-latency-ns = <244144>; /* 8 32k periods */
93 clock-latency-ns = <244144>; /* 8 32k periods */
/Linux-v6.1/arch/x86/kernel/cpu/resctrl/
Dpseudo_lock_event.h11 TP_PROTO(u32 latency),
12 TP_ARGS(latency),
13 TP_STRUCT__entry(__field(u32, latency)),
14 TP_fast_assign(__entry->latency = latency),
15 TP_printk("latency=%u", __entry->latency)
/Linux-v6.1/drivers/char/tpm/st33zp24/
Dspi.c45 * Between command and response, there are latency byte (up to 15
51 * some latency byte before the answer is available (max 15).
65 int latency; member
124 memset(&phy->tx_buf[total_length], TPM_DUMMY_BYTE, phy->latency); in st33zp24_spi_send()
126 spi_xfer.len = total_length + phy->latency; in st33zp24_spi_send()
130 ret = phy->rx_buf[total_length + phy->latency - 1]; in st33zp24_spi_send()
160 phy->latency + tpm_size); in st33zp24_spi_read8_reg()
162 spi_xfer.len = total_length + phy->latency + tpm_size; in st33zp24_spi_read8_reg()
167 ret = phy->rx_buf[total_length + phy->latency - 1]; in st33zp24_spi_read8_reg()
169 memcpy(tpm_data, phy->rx_buf + total_length + phy->latency, in st33zp24_spi_read8_reg()
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/powerpc/power9/
Dmetrics.json62 "BriefDescription": "Stalls due to short latency decimal floating ops.",
128 "BriefDescription": "Stalls due to short latency double precision ops.",
193 …"BriefDescription": "Completion stall due to a long latency scalar fixed point instruction (divisi…
199 "BriefDescription": "Stalls due to short latency integer ops",
560 "BriefDescription": "Vector stalls due to small latency double precision ops",
583 …"BriefDescription": "Completion stall due to a long latency vector fixed point instruction (divisi…
589 "BriefDescription": "Vector stalls due to small latency integer ops",
805 …tion": "estimate of dl2l3 distant MOD miss rates with measured DL2L3 MOD latency as a %of dcache m…
811 …tion": "estimate of dl2l3 distant SHR miss rates with measured DL2L3 SHR latency as a %of dcache m…
817 …"BriefDescription": "estimate of distant L4 miss rates with measured DL4 latency as a %of dcache m…
[all …]
/Linux-v6.1/tools/tracing/
DMakefile4 all: latency rtla
10 latency: target
11 $(call descend,latency)
14 $(call descend,latency,install)
17 $(call descend,latency,clean)
28 .PHONY: all install clean latency latency_install latency_clean \
/Linux-v6.1/tools/perf/pmu-events/arch/x86/icelakex/
Dmemory.json27 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
37 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency
43 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
53 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency
59 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
69 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency
75 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
85 …ds when the latency from first dispatch to completion is greater than 32 cycles. Reported latency
91 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
101 …ds when the latency from first dispatch to completion is greater than 4 cycles. Reported latency
[all …]
/Linux-v6.1/drivers/cpuidle/
Dcpuidle-pseries.c99 * CEDE_LATENCY_TOKEN corresponds to the token value for Cede Latency
105 * If the platform supports the cede latency settings information system
109 * a. The first byte is the length “N” of each cede latency setting record minus
112 * b. For each supported cede latency setting a cede latency setting record
119 * | Cede Latency | 1 Byte |
123 * | latency in | 8 Bytes |
131 * This version has cede latency record size = 10.
207 pr_info("xcede: Record %d : hint = %u, latency = 0x%llx tb ticks, Wake-on-irq = %u\n", in parse_cede_parameters()
362 * does not advertise CEDE(0) exit latency values, it does in fixup_cede0_latency()
363 * advertise the latency values of the extended CEDE states. in fixup_cede0_latency()
[all …]
/Linux-v6.1/tools/testing/selftests/timers/
Dnsleep-lat.c1 /* Measure nanosleep timer latency
101 long long latency = 0; in nanosleep_lat_test() local
114 /* First check relative latency */ in nanosleep_lat_test()
121 printf("Large rel latency: %lld ns :", (timespec_sub(start, end)/count)-ns); in nanosleep_lat_test()
125 /* Next check absolute latency */ in nanosleep_lat_test()
131 latency += timespec_sub(target, end); in nanosleep_lat_test()
134 if (latency/count > UNRESONABLE_LATENCY) { in nanosleep_lat_test()
135 printf("Large abs latency: %lld ns :", latency/count); in nanosleep_lat_test()
157 printf("nsleep latency %-26s ", clockstring(clockid)); in main()

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