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/Linux-v5.4/arch/sh/lib/
Dmemcpy-sh4.S31 mov r4,r2 ! 5 MT (0 cycles latency)
33 mov.l @(r0,r5),r7 ! 21 LS (2 cycles latency)
40 3: mov.l @(r0,r5),r1 ! 21 LS (latency=2) ! NMLK
41 mov r7, r3 ! 5 MT (latency=0) ! RQPO
46 mov r1,r6 ! 5 MT (latency=0)
50 mov r1, r7 ! 5 MT (latency=0)
57 3: mov.l @(r0,r5),r1 ! 21 LS (latency=2) ! KLMN
58 mov r7,r3 ! 5 MT (latency=0) ! OPQR
64 mov r1,r6 ! 5 MT (latency=0)
67 mov r1,r7 ! 5 MT (latency=0)
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/opp/
Dqcom-nvmem-cpufreq.txt151 clock-latency-ns = <200000>;
157 clock-latency-ns = <200000>;
163 clock-latency-ns = <200000>;
169 clock-latency-ns = <200000>;
175 clock-latency-ns = <200000>;
181 clock-latency-ns = <200000>;
187 clock-latency-ns = <200000>;
193 clock-latency-ns = <200000>;
199 clock-latency-ns = <200000>;
205 clock-latency-ns = <200000>;
[all …]
Dsun50i-nvmem-cpufreq.txt47 clock-latency-ns = <244144>; /* 8 32k periods */
58 clock-latency-ns = <244144>; /* 8 32k periods */
69 clock-latency-ns = <244144>; /* 8 32k periods */
80 clock-latency-ns = <244144>; /* 8 32k periods */
92 clock-latency-ns = <244144>; /* 8 32k periods */
101 clock-latency-ns = <244144>; /* 8 32k periods */
110 clock-latency-ns = <244144>; /* 8 32k periods */
119 clock-latency-ns = <244144>; /* 8 32k periods */
128 clock-latency-ns = <244144>; /* 8 32k periods */
137 clock-latency-ns = <244144>; /* 8 32k periods */
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/arm/
Didle-states.txt31 Idle state parameters (e.g. entry latency) are platform specific and need to be
53 | latency |
55 | latency |
57 |<------- wakeup-latency ------->|
65 event conditions. The abort latency is assumed to be negligible
79 entry-latency: Worst case latency required to enter the idle state. The
80 exit-latency may be guaranteed only after entry-latency has passed.
85 wakeup-latency: Maximum delay between the signaling of a wake-up event and the
87 to be entry-latency + exit-latency.
99 wakeup-delay = exit-latency + max(entry-latency - (now - entry-timestamp), 0)
[all …]
Dl2c2x0.yaml66 arm,data-latency:
67 description: Cycles of latency for Data RAM accesses. Specifies 3 cells of
69 without setup latency control should use a value of 0.
78 arm,tag-latency:
79 description: Cycles of latency for Tag RAM accesses. Specifies 3 cells of
80 read, write and setup latencies. Controllers without setup latency control
81 should use 0. Controllers without separate read and write Tag RAM latency
91 arm,dirty-latency:
92 description: Cycles of latency for Dirty RAMs. This is a single cell.
244 arm,data-latency = <1 1 1>;
[all …]
/Linux-v5.4/kernel/
Dlatencytop.c3 * latencytop.c: Latency display infrastructure
10 * CONFIG_LATENCYTOP enables a kernel latency tracking infrastructure that is
11 * used by the "latencytop" userspace tool. The latency that is tracked is not
12 * the 'traditional' interrupt latency (which is primarily caused by something
13 * else consuming CPU), but instead, it is the latency an application encounters
17 * 1) System level latency
18 * 2) Per process latency
20 * The latency is stored in fixed sized data structures in an accumulated form;
21 * if the "same" latency cause is hit twice, this will be tracked as one entry
22 * in the data structure. Both the count, total accumulated latency and maximum
[all …]
/Linux-v5.4/tools/perf/pmu-events/arch/x86/icelake/
Dmemory.json293 …ds when the latency from first dispatch to completion is greater than 4 cycles. Reported latency
302 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
308 …ds when the latency from first dispatch to completion is greater than 8 cycles. Reported latency
317 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
323 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency
332 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
338 …ds when the latency from first dispatch to completion is greater than 32 cycles. Reported latency
347 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
353 …ds when the latency from first dispatch to completion is greater than 64 cycles. Reported latency
362 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
[all …]
/Linux-v5.4/tools/perf/pmu-events/arch/x86/ivybridge/
Dmemory.json42 "PublicDescription": "Loads with latency value being above 4.",
50 "BriefDescription": "Loads with latency value being above 4",
56 "PublicDescription": "Loads with latency value being above 8.",
64 "BriefDescription": "Loads with latency value being above 8",
70 "PublicDescription": "Loads with latency value being above 16.",
78 "BriefDescription": "Loads with latency value being above 16",
84 "PublicDescription": "Loads with latency value being above 32.",
92 "BriefDescription": "Loads with latency value being above 32",
98 "PublicDescription": "Loads with latency value being above 64.",
106 "BriefDescription": "Loads with latency value being above 64",
[all …]
/Linux-v5.4/tools/perf/pmu-events/arch/powerpc/power8/
Dmetrics.json744 …tion": "estimate of dl2l3 distant MOD miss rates with measured DL2L3 MOD latency as a %of dcache m…
750 …tion": "estimate of dl2l3 distant SHR miss rates with measured DL2L3 SHR latency as a %of dcache m…
756 …"BriefDescription": "estimate of distant L4 miss rates with measured DL4 latency as a %of dcache m…
762 …"BriefDescription": "estimate of distant memory miss rates with measured DMEM latency as a %of dca…
768 …"BriefDescription": "estimate of dl21 MOD miss rates with measured L21 MOD latency as a %of dcache…
774 …"BriefDescription": "estimate of dl21 SHR miss rates with measured L21 SHR latency as a %of dcache…
780 …"BriefDescription": "estimate of dl2 miss rates with measured L2 latency as a %of dcache miss cpi",
786 …"BriefDescription": "estimate of dl31 MOD miss rates with measured L31 MOD latency as a %of dcache…
792 …"BriefDescription": "estimate of dl31 SHR miss rates with measured L31 SHR latency as a %of dcache…
798 …"BriefDescription": "estimate of dl3 miss rates with measured L3 latency as a % of dcache miss cpi…
[all …]
/Linux-v5.4/Documentation/power/
Dpm_qos_interface.rst11 2. the per-device PM QoS framework provides the API to manage the per-device latency
16 * latency: usec
95 2. PM QoS per-device latency and flags framework
99 maintained along with the aggregated targets of resume latency and active
100 state latency tolerance (in microseconds) and the third one is for PM QoS flags.
103 The target values of resume latency and active state latency tolerance are
155 Add a request to the device's PM QoS list of resume latency constraints and
161 PM QoS list of resume latency constraints and remove sysfs attribute
189 Active state latency tolerance
198 If there is a latency tolerance control mechanism for a given device available
[all …]
/Linux-v5.4/arch/x86/kernel/cpu/resctrl/
Dpseudo_lock_event.h11 TP_PROTO(u32 latency),
12 TP_ARGS(latency),
13 TP_STRUCT__entry(__field(u32, latency)),
14 TP_fast_assign(__entry->latency = latency),
15 TP_printk("latency=%u", __entry->latency)
/Linux-v5.4/drivers/char/tpm/st33zp24/
Dspi.c45 * Between command and response, there are latency byte (up to 15
51 * some latency byte before the answer is available (max 15).
65 int latency; member
124 memset(&phy->tx_buf[total_length], TPM_DUMMY_BYTE, phy->latency); in st33zp24_spi_send()
126 spi_xfer.len = total_length + phy->latency; in st33zp24_spi_send()
130 ret = phy->rx_buf[total_length + phy->latency - 1]; in st33zp24_spi_send()
160 phy->latency + tpm_size); in st33zp24_spi_read8_reg()
162 spi_xfer.len = total_length + phy->latency + tpm_size; in st33zp24_spi_read8_reg()
167 ret = phy->rx_buf[total_length + phy->latency - 1]; in st33zp24_spi_read8_reg()
169 memcpy(tpm_data, phy->rx_buf + total_length + phy->latency, in st33zp24_spi_read8_reg()
[all …]
/Linux-v5.4/arch/arm/boot/dts/
Dexynos5800.dtsi60 clock-latency-ns = <140000>;
65 clock-latency-ns = <140000>;
70 clock-latency-ns = <140000>;
75 clock-latency-ns = <140000>;
80 clock-latency-ns = <140000>;
112 clock-latency-ns = <140000>;
117 clock-latency-ns = <140000>;
122 clock-latency-ns = <140000>;
127 clock-latency-ns = <140000>;
/Linux-v5.4/tools/testing/selftests/timers/
Dnsleep-lat.c1 /* Measure nanosleep timer latency
101 long long latency = 0; in nanosleep_lat_test() local
114 /* First check relative latency */ in nanosleep_lat_test()
121 printf("Large rel latency: %lld ns :", (timespec_sub(start, end)/count)-ns); in nanosleep_lat_test()
125 /* Next check absolute latency */ in nanosleep_lat_test()
131 latency += timespec_sub(target, end); in nanosleep_lat_test()
134 if (latency/count > UNRESONABLE_LATENCY) { in nanosleep_lat_test()
135 printf("Large abs latency: %lld ns :", latency/count); in nanosleep_lat_test()
157 printf("nsleep latency %-26s ", clockstring(clockid)); in main()
/Linux-v5.4/Documentation/devicetree/bindings/power/
Ddomain-idle-state.txt13 - entry-latency-us
16 Definition: u32 value representing worst case latency in
18 The exit-latency-us duration may be guaranteed
19 only after entry-latency-us has passed.
21 - exit-latency-us
24 Definition: u32 value representing worst case latency
/Linux-v5.4/drivers/iio/common/hid-sensors/
Dhid-sensor-trigger.c27 int latency; in _hid_sensor_set_report_latency() local
33 latency = integer * 1000 + fract / 1000; in _hid_sensor_set_report_latency()
34 ret = hid_sensor_set_report_latency(attrb, latency); in _hid_sensor_set_report_latency()
49 int latency; in _hid_sensor_get_report_latency() local
51 latency = hid_sensor_get_report_latency(attrb); in _hid_sensor_get_report_latency()
52 if (latency < 0) in _hid_sensor_get_report_latency()
53 return latency; in _hid_sensor_get_report_latency()
55 return sprintf(buf, "%d.%06u\n", latency / 1000, (latency % 1000) * 1000); in _hid_sensor_get_report_latency()
64 int latency; in _hid_sensor_get_fifo_state() local
66 latency = hid_sensor_get_report_latency(attrb); in _hid_sensor_get_fifo_state()
[all …]
/Linux-v5.4/sound/soc/ti/
Domap-mcpdm.c44 int latency[2]; member
283 if (mcpdm->latency[stream2]) in omap_mcpdm_dai_shutdown()
285 mcpdm->latency[stream2]); in omap_mcpdm_dai_shutdown()
286 else if (mcpdm->latency[stream1]) in omap_mcpdm_dai_shutdown()
289 mcpdm->latency[stream1] = 0; in omap_mcpdm_dai_shutdown()
302 int channels, latency; in omap_mcpdm_dai_hw_params() local
346 latency = threshold; in omap_mcpdm_dai_hw_params()
353 latency = (MCPDM_DN_THRES_MAX - threshold); in omap_mcpdm_dai_hw_params()
357 * The DMA must act to a DMA request within latency time (usec) to avoid in omap_mcpdm_dai_hw_params()
360 mcpdm->latency[stream] = latency * USEC_PER_SEC / params_rate(params); in omap_mcpdm_dai_hw_params()
[all …]
/Linux-v5.4/tools/perf/pmu-events/arch/powerpc/power9/
Dmetrics.json62 "BriefDescription": "Stalls due to short latency decimal floating ops.",
128 "BriefDescription": "Stalls due to short latency double precision ops.",
193 …"BriefDescription": "Completion stall due to a long latency scalar fixed point instruction (divisi…
199 "BriefDescription": "Stalls due to short latency integer ops",
482 "BriefDescription": "Vector stalls due to small latency double precision ops",
505 …"BriefDescription": "Completion stall due to a long latency vector fixed point instruction (divisi…
511 "BriefDescription": "Vector stalls due to small latency integer ops",
727 …tion": "estimate of dl2l3 distant MOD miss rates with measured DL2L3 MOD latency as a %of dcache m…
733 …tion": "estimate of dl2l3 distant SHR miss rates with measured DL2L3 SHR latency as a %of dcache m…
739 …"BriefDescription": "estimate of distant L4 miss rates with measured DL4 latency as a %of dcache m…
[all …]
/Linux-v5.4/Documentation/arm/omap/
Domap_pm.rst6 authors use these functions to communicate minimum latency or
17 latency framework or something else;
20 latency and throughput, rather than units which are specific to OMAP
34 1. Set the maximum MPU wakeup latency::
38 2. Set the maximum device wakeup latency::
42 3. Set the maximum system DMA transfer start latency (CORE pwrdm)::
88 latency, and the set_max_dev_wakeup_lat() function to constrain the
89 device wakeup latency (from clk_enable() to accessibility). For
92 /* Limit MPU wakeup latency */
96 /* Limit device powerdomain wakeup latency */
[all …]
/Linux-v5.4/tools/power/cpupower/man/
Dcpupower-idle-set.122 \fB\-D\fR \fB\-\-disable-by-latency\fR <LATENCY>
23 Disable all idle states with a equal or higher latency than <LATENCY>.
25 Enable all idle states with a latency lower than <LATENCY>.
/Linux-v5.4/arch/alpha/lib/
Dev67-strrchr.S38 ldq_u t0, 0(a0) # L : load first quadword Latency=3
69 nop # : Latency=2, extra map slot (keep nop with cmov)
72 cmovne t3, t3, t8 # E : Latency=2, extra map slot
90 cmovne t3, t3, t8 # E : save it, if match found Latency=2, extra map slot
97 ctlz t8, t2 # U0 : Latency=3 (0x40 for t8=0)
101 nop # E : hide the cmov latency (2) behind ctlz latency
106 ret # L0 : Latency=3
/Linux-v5.4/tools/testing/selftests/ftrace/test.d/trigger/
Dtrigger-trace-marker-synthetic-kernel.tc41 echo "Test histogram kernel event to trace_marker latency histogram trigger"
43 echo 'latency u64 lat' > synthetic_events
45 echo 'hist:keys=common_pid:lat=common_timestamp.usecs-$ts0:onmatch(sched.sched_waking).latency($lat…
46 echo 'hist:keys=common_pid,lat:sort=lat' > events/synthetic/latency/trigger
53 grep 'hitcount: *1$' events/synthetic/latency/hist > /dev/null || \
Dtrigger-trace-marker-synthetic.tc36 echo "Test histogram trace_marker to trace_marker latency histogram trigger"
38 echo 'latency u64 lat' > synthetic_events
40 echo 'hist:keys=common_pid:lat=common_timestamp.usecs-$ts0:onmatch(ftrace.print).latency($lat) if b…
41 echo 'hist:keys=common_pid,lat:sort=lat' > events/synthetic/latency/trigger
51 grep 'hitcount: *1$' events/synthetic/latency/hist > /dev/null || \
/Linux-v5.4/block/
Dkyber-iosched.c3 * The Kyber I/O scheduler. Controls latency by throttling queue depths using
68 * Default latency targets for each scheduling domain.
89 * to the target latency:
91 * <= 1/4 * target latency
92 * <= 1/2 * target latency
93 * <= 3/4 * target latency
94 * <= target latency
95 * <= 1 1/4 * target latency
96 * <= 1 1/2 * target latency
97 * <= 1 3/4 * target latency
[all …]
/Linux-v5.4/tools/perf/Documentation/
Dperf-mem.txt22 Note that on Intel systems the memory latency reported is the use-latency,
23 not the pure load (or store latency). Use latency includes any pipeline
24 queueing delays in addition to the memory subsystem latency.
85 Specify desired latency for loads event. (x86 only)

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