Searched full:latching (Results 1 – 25 of 32) sorted by relevance
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75 PDMIN1 - PDMCLK latching edge used for channel 1 and 2 data76 PDMIN2 - PDMCLK latching edge used for channel 3 and 4 data77 PDMIN3 - PDMCLK latching edge used for channel 5 and 6 data78 PDMIN4 - PDMCLK latching edge used for channel 7 and 8 data
16 - Latching of the levels on mode pins when PRESET# is negated,
138 and the delay before latching a value to an output
172 * @gpio.rd: Read latching signal173 * @gpio.wr: Write latching signal
157 * before latching the timer count to guarantee that although in mfgpt_read()
52 * before latching the timer count to guarantee that although in i8253_read()
78 * before latching the timer count to guarantee that although in ls1x_clocksource_read()
85 * reading integer part triggers latching of the decimal part, in sbtsi_read()
142 * earliest/latest points for register latching regardless in intel_vrr_compute_config()
114 /* Read (and reset) the latching version of the status */ in aq100x_intr_handler()
695 * The GPIO Interrupt register on the AEL2020 is a "Latching High" in ael2020_intr_clear()
57 * doorbell register pair, which has its own latching, and
156 * half speed or use delayed read latching (errata 13). in sdram_calculate_timing()
256 * Periodically toggle SDZ (shutdown bit) H->L->H to clear any latching in tas5720_fault_check_work()
611 /* Set the pin to input mode with no latching. */ in bmi160_config_pin()
277 * according to Amlogic the following latching points are in meson_mx_sdhc_set_clk()
890 /* Clear rcvflt bit (latching high) and read it back */ in bgx_xaui_check_link()1005 /* Receive link is latching low. Force it high and verify it */ in bgx_poll_for_link()
526 * disable latching function on VSYNC - shadowed registers in ccdc_config_raw()
385 /* Disable latching function registers on VSYNC */ in ccdc_config_raw()
238 #define SC16IS7XX_IOCONTROL_LATCH_BIT (1 << 0) /* Enable input latching */
1355 * the HW has been latching RX/TX packet interrupts while in ftgmac100_poll()
390 * following the latching of any double buffered registers
1719 * For LPM mode latching we set the latch enable bit and selected mode in pmc_core_lpm_latch_mode_write()
1598 * REQ by latching the SCSI data into the INPUT DATA register and asserting in NCR5380_transfer_dma()
