Searched +full:latch +full:- +full:ck (Results 1 – 5 of 5) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/mmc/mtk-sd.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Chaotian Jing <chaotian.jing@mediatek.com>11 - Wenbin Mei <wenbin.mei@mediatek.com>14 - $ref: mmc-controller.yaml#19 - enum:20 - mediatek,mt2701-mmc21 - mediatek,mt2712-mmc[all …]
1 /* SPDX-License-Identifier: GPL-2.0-only */6 * Tero Kristo (t-kristo@ti.com)16 s8 latch; member32 s8 latch; member87 #define CLK(dev, con, ck) \ argument93 .clk = ck, \142 * struct ti_dt_clk - OMAP DT clock alias declarations
1 // SPDX-License-Identifier: GPL-2.0-only3 * Copyright (c) 2014-2015, 2022 MediaTek Inc.11 #include <linux/dma-mapping.h>36 #include <linux/mmc/slot-gpio.h>43 /*--------------------------------------------------------------------------*/45 /*--------------------------------------------------------------------------*/52 /*--------------------------------------------------------------------------*/54 /*--------------------------------------------------------------------------*/91 /*--------------------------------------------------------------------------*/93 /*--------------------------------------------------------------------------*/[all …]
3 * Copyright (c) 2007-2013 Broadcom Corporation13 * R - Read only14 * RC - Clear on read15 * RW - Read/Write16 * ST - Statistics register (clear on read)17 * W - Write only18 * WB - Wide bus register - the size is over 32 bits and it should be20 * WR - Write Clear (write 1 to clear the bit)32 /* [RW 1] Initiate the ATC array - reset all the valid bits */56 * BRB1_IND_FREE_LIST_PRS_CRDT+2 initialize parser initial credit. Warning -[all …]
1 // SPDX-License-Identifier: GPL-2.02 /* Copyright(c) 1999 - 2018 Intel Corporation. */35 static int debug = -1;110 * __ew32_prepare - prepare to write to MAC CSR register on certain parts125 while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i) in __ew32_prepare()131 if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) in __ew32()134 writel(val, hw->hw_addr + reg); in __ew32()138 * e1000_regdump - register printout routine148 switch (reginfo->ofs) { in e1000_regdump()162 pr_info("%-15s %08x\n", in e1000_regdump()[all …]
