Home
last modified time | relevance | path

Searched full:lanes (Results 1 – 25 of 792) sorted by relevance

12345678910>>...32

/Linux-v6.1/tools/testing/selftests/drivers/net/mlxsw/
Dethtool_lanes.sh27 local lanes_exist=$(ethtool $swp1 | grep 'Lanes:')
29 log_test "SKIP: driver does not support lanes setting"
40 local lanes=$1; shift
44 chosen_lanes=$(ethtool $dev | grep 'Lanes:')
45 chosen_lanes=${chosen_lanes#*"Lanes: "}
47 ((chosen_lanes == lanes))
48 check_err $? "swp1 advertise $max_speed and $lanes, devs sync to $chosen_lanes"
65 ethtool -s $swp1 speed $max_speed lanes $unsupported_lanes $autoneg_str &> /dev/null
66 check_fail $? "Unsuccessful $unsupported_lanes lanes setting was expected"
93 local lanes=$1; shift
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/media/
Dqcom,sm8250-camss.yaml125 clock-lanes:
128 data-lanes:
133 - clock-lanes
134 - data-lanes
148 clock-lanes:
151 data-lanes:
156 - clock-lanes
157 - data-lanes
171 clock-lanes:
174 data-lanes:
[all …]
Dti,cal.yaml86 clock-lanes:
89 data-lanes:
104 clock-lanes:
107 data-lanes:
146 clock-lanes = <0>;
147 data-lanes = <1 2>;
170 clock-lanes = <0>;
171 data-lanes = <1 2>;
/Linux-v6.1/drivers/staging/media/omap4iss/
Diss_csiphy.c21 * csiphy_lanes_config - Configuration of CSIPHY lanes.
36 reg |= (phy->lanes.data[i].pol ? in csiphy_lanes_config()
38 reg |= (phy->lanes.data[i].pos << in csiphy_lanes_config()
44 reg |= phy->lanes.clk.pol ? CSI2_COMPLEXIO_CFG_CLOCK_POL : 0; in csiphy_lanes_config()
45 reg |= phy->lanes.clk.pos << CSI2_COMPLEXIO_CFG_CLOCK_POSITION_SHIFT; in csiphy_lanes_config()
123 struct iss_csiphy_lanes_cfg *lanes; in omap4iss_csiphy_config() local
128 lanes = &subdevs->bus.csi2.lanecfg; in omap4iss_csiphy_config()
150 /* Enable all lanes for now */ in omap4iss_csiphy_config()
161 /* Enable all lanes for now */ in omap4iss_csiphy_config()
173 /* Clock and data lanes verification */ in omap4iss_csiphy_config()
[all …]
/Linux-v6.1/tools/testing/selftests/net/
Ddevlink_port_split.py12 # Test port split configuration using devlink-port lanes attribute.
75 Get the $port's maximum number of lanes.
76 Return: number of lanes, e.g. 1, 2, 4 and 8.
84 if 'lanes' in values:
85 lanes = values['lanes']
87 lanes = 0
88 return lanes
148 def exists_and_lanes(ports, lanes, dev): argument
151 $lanes number of lanes after splitting.
160 if max_lanes != lanes:
[all …]
/Linux-v6.1/arch/arm64/boot/dts/renesas/
Dr8a779a0-falcon-csi-dsi.dtsi19 clock-lanes = <0>;
20 data-lanes = <1 2 3 4>;
38 clock-lanes = <0>;
39 data-lanes = <1 2 3 4>;
57 clock-lanes = <0>;
58 data-lanes = <1 2 3 4>;
108 clock-lanes = <0>;
109 data-lanes = <1 2 3 4>;
128 clock-lanes = <0>;
129 data-lanes = <1 2 3 4>;
[all …]
Dhihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi18 clock-lanes = <0>;
19 data-lanes = <1 2>;
32 clock-lanes = <0>;
33 data-lanes = <1 2>;
49 clock-lanes = <0>;
50 data-lanes = <1 2>;
63 clock-lanes = <0>;
64 data-lanes = <1 2>;
Dr8a774c0-ek874-mipi-2.1.dts38 clock-lanes = <0>;
39 data-lanes = <1 2>;
52 clock-lanes = <0>;
53 data-lanes = <1 2>;
62 clock-lanes = <0>;
63 data-lanes = <1 2>;
/Linux-v6.1/drivers/gpu/drm/bridge/adv7511/
Dadv7533.c32 static const u8 clock_div_by_lanes[] = { 6, 4, 3 }; /* 2, 3, 4 lanes */ in adv7511_dsi_config_timing_gen()
43 clock_div_by_lanes[dsi->lanes - 2] << 3); in adv7511_dsi_config_timing_gen()
73 /* set number of dsi lanes */ in adv7533_dsi_power_on()
74 regmap_write(adv->regmap_cec, 0x1c, dsi->lanes << 4); in adv7533_dsi_power_on()
106 int lanes, ret; in adv7533_mode_set() local
112 lanes = 4; in adv7533_mode_set()
114 lanes = 3; in adv7533_mode_set()
116 if (lanes != dsi->lanes) { in adv7533_mode_set()
118 dsi->lanes = lanes; in adv7533_mode_set()
121 dev_err(&dsi->dev, "failed to change host lanes\n"); in adv7533_mode_set()
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/media/i2c/
Dadv748x.yaml83 clock-lanes:
86 data-lanes:
91 - clock-lanes
92 - data-lanes
106 clock-lanes:
109 data-lanes:
113 - clock-lanes
114 - data-lanes
195 clock-lanes = <0>;
196 data-lanes = <1 2 3 4>;
[all …]
/Linux-v6.1/drivers/media/platform/ti/omap3isp/
Dispcsiphy.c167 struct isp_csiphy_lanes_cfg *lanes; in omap3isp_csiphy_config() local
175 lanes = &buscfg->bus.ccp2.lanecfg; in omap3isp_csiphy_config()
178 lanes = &buscfg->bus.csi2.lanecfg; in omap3isp_csiphy_config()
185 /* Clock and data lanes verification */ in omap3isp_csiphy_config()
187 if (lanes->data[i].pol > 1 || lanes->data[i].pos > 3) in omap3isp_csiphy_config()
190 if (used_lanes & (1 << lanes->data[i].pos)) in omap3isp_csiphy_config()
193 used_lanes |= 1 << lanes->data[i].pos; in omap3isp_csiphy_config()
196 if (lanes->clk.pol > 1 || lanes->clk.pos > 3) in omap3isp_csiphy_config()
199 if (lanes->clk.pos == 0 || used_lanes & (1 << lanes->clk.pos)) in omap3isp_csiphy_config()
211 /* CSI-2 is DDR and we only count used lanes. */ in omap3isp_csiphy_config()
[all …]
/Linux-v6.1/drivers/gpu/drm/tegra/
Ddp.c51 link->lanes = 0; in drm_dp_link_reset()
233 link->lanes = link->max_lanes; in drm_dp_link_probe()
346 values[1] = link->lanes; in drm_dp_link_configure()
381 * with the lowest number of lanes and the lowest possible link rate that can
393 /* available number of lanes */ in drm_dp_link_choose()
394 static const unsigned int lanes[3] = { 1, 2, 4 }; in drm_dp_link_choose() local
402 for (i = 0; i < ARRAY_SIZE(lanes) && lanes[i] <= link->max_lanes; i++) { in drm_dp_link_choose()
405 * Capacity for this combination of lanes and rate, in drm_dp_link_choose()
412 capacity = lanes[i] * (rates[j] * 10) * 8 / 10; in drm_dp_link_choose()
415 DRM_DEBUG_KMS("using %u lanes at %u kHz (%lu/%lu kbps)\n", in drm_dp_link_choose()
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/phy/
Dnvidia,tegra124-xusb-padctl.txt4 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
7 documentation. Each such "pad" may control either one or multiple lanes,
8 and thus contains any logic common to all its lanes. Each lane can be
11 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
12 super-speed USB. Other lanes are for various types of low-speed, full-speed
15 ports (e.g. PCIe) and the lanes.
81 the pad and any of its lanes, this property must be set to "okay".
128 Each pad node has a child named "lanes" that contains one or more children of
129 its own, each representing one of the lanes controlled by the pad.
284 lanes {
[all …]
Dphy-cadence-sierra.yaml83 Each group of PHY lanes with a single master lane should be represented as
97 Contains list of resets, one per lane, to get all the link lanes out of reset.
104 Specifies the type of PHY for which the group of PHY lanes is used.
109 cdns,num-lanes:
111 Number of lanes in this group. The group is made up of consecutive lanes.
162 cdns,num-lanes = <2>;
169 cdns,num-lanes = <1>;
Dphy-cadence-torrent.yaml81 Each group of PHY lanes with a single master lane should be represented as a sub-node.
93 Contains list of resets, one per lane, to get all the link lanes out of reset.
100 Specifies the type of PHY for which the group of PHY lanes is used.
106 cdns,num-lanes:
108 Number of lanes.
134 - cdns,num-lanes
176 cdns,num-lanes = <4>;
204 cdns,num-lanes = <2>;
213 cdns,num-lanes = <1>;
/Linux-v6.1/Documentation/devicetree/bindings/pci/
Dnvidia,tegra20-pcie.txt104 - If lanes 0 to 3 are used:
107 - If lanes 4 or 5 are used:
148 - nvidia,num-lanes: Number of lanes to use for this port. Valid combinations
150 - Root port 0 uses 4 lanes, root port 1 is unused.
151 - Both root ports use 2 lanes.
157 number of lanes in the nvidia,num-lanes property. Entries are of the form
158 "pcie-N": where N ranges from 0 to the value specified in nvidia,num-lanes.
210 nvidia,num-lanes = <2>;
224 nvidia,num-lanes = <2>;
316 nvidia,num-lanes = <2>;
[all …]
/Linux-v6.1/include/linux/phy/
Dphy-dp.h28 * @lanes:
30 * Number of active, consecutive, data lanes, starting from
35 unsigned int lanes; member
41 * to be used by particular lanes. One value per lane.
52 * used by particular lanes. One value per lane.
88 * and pre-emphasis to requested values. Only lanes specified
89 * by "lanes" parameter will be affected.
/Linux-v6.1/Documentation/devicetree/bindings/media/xilinx/
Dxlnx,csi2rxss.yaml88 xlnx,en-active-lanes:
91 Present if the number of active lanes can be re-configured at
92 runtime in the Protocol Configuration Register. Otherwise all lanes,
115 data-lanes:
121 1 2 - For 2 lanes enabled in IP.
122 1 2 3 - For 3 lanes enabled in IP.
123 1 2 3 4 - For 4 lanes enabled in IP.
131 - data-lanes
180 xlnx,en-active-lanes;
195 data-lanes = <1 2 3 4>;
/Linux-v6.1/drivers/video/fbdev/omap2/omapfb/dss/
Dhdmi_common.c18 prop = of_find_property(ep, "lanes", &len); in hdmi_parse_lanes_of()
20 u32 lanes[8]; in hdmi_parse_lanes_of() local
22 if (len / sizeof(u32) != ARRAY_SIZE(lanes)) { in hdmi_parse_lanes_of()
23 dev_err(&pdev->dev, "bad number of lanes\n"); in hdmi_parse_lanes_of()
27 r = of_property_read_u32_array(ep, "lanes", lanes, in hdmi_parse_lanes_of()
28 ARRAY_SIZE(lanes)); in hdmi_parse_lanes_of()
34 r = hdmi_phy_parse_lanes(phy, lanes); in hdmi_parse_lanes_of()
/Linux-v6.1/drivers/gpu/drm/omapdrm/dss/
Dhdmi_common.c18 prop = of_find_property(ep, "lanes", &len); in hdmi_parse_lanes_of()
20 u32 lanes[8]; in hdmi_parse_lanes_of() local
22 if (len / sizeof(u32) != ARRAY_SIZE(lanes)) { in hdmi_parse_lanes_of()
23 dev_err(&pdev->dev, "bad number of lanes\n"); in hdmi_parse_lanes_of()
27 r = of_property_read_u32_array(ep, "lanes", lanes, in hdmi_parse_lanes_of()
28 ARRAY_SIZE(lanes)); in hdmi_parse_lanes_of()
34 r = hdmi_phy_parse_lanes(phy, lanes); in hdmi_parse_lanes_of()
/Linux-v6.1/net/ethtool/
Dlinkmodes.c49 data->ksettings.lanes = 0; in linkmodes_prepare_data()
133 if (ksettings->lanes && in linkmodes_fill_reply()
134 nla_put_u32(skb, ETHTOOL_A_LINKMODES_LANES, ksettings->lanes)) in linkmodes_fill_reply()
180 * lanes and duplex values. Called when autonegotiation is on, speed, lanes or
202 (!req_lanes || info->lanes == ksettings->lanes) && in ethnl_auto_linkmodes()
241 "lanes value is invalid"); in ethnl_check_linkmodes()
276 /* If autoneg is off and lanes parameter is not supported by the in ethnl_update_linkmodes()
282 "lanes configuration not supported by device"); in ethnl_update_linkmodes()
286 /* If autoneg is off and lanes parameter is not passed from user, in ethnl_update_linkmodes()
287 * set the lanes parameter to 0. in ethnl_update_linkmodes()
[all …]
/Linux-v6.1/drivers/net/ethernet/netronome/nfp/
Dnfp_devlink.c39 nfp_devlink_set_lanes(struct nfp_pf *pf, unsigned int idx, unsigned int lanes) in nfp_devlink_set_lanes() argument
48 ret = __nfp_eth_set_split(nsp, lanes); in nfp_devlink_set_lanes()
69 unsigned int lanes; in nfp_devlink_port_split() local
82 lanes = eth_port.port_lanes / count; in nfp_devlink_port_split()
83 if (eth_port.lanes == 10 && count == 2) in nfp_devlink_port_split()
84 lanes = 8 / count; in nfp_devlink_port_split()
86 return nfp_devlink_set_lanes(pf, eth_port.index, lanes); in nfp_devlink_port_split()
95 unsigned int lanes; in nfp_devlink_port_unsplit() local
108 lanes = eth_port.port_lanes; in nfp_devlink_port_unsplit()
110 lanes = 10; in nfp_devlink_port_unsplit()
[all …]
/Linux-v6.1/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dpppcielanes.c33 /* For converting from number of lanes to lane bits. */
37 2, /* 2 Lanes */
39 3, /* 4 Lanes */
43 4, /* 8 Lanes */
47 5, /* 12 Lanes (Not actually supported) */
51 6 /* 16 Lanes */
/Linux-v6.1/drivers/phy/rockchip/
Dphy-rockchip-snps-pcie3.c59 u32 lanes[4]; member
97 dev_info(&phy->dev, "lane number %d, val %d\n", i, priv->lanes[i]); in rockchip_p3phy_rk3568_init()
98 if (priv->lanes[i] > 1) in rockchip_p3phy_rk3568_init()
142 if (!priv->lanes[i]) in rockchip_p3phy_rk3588_init()
145 if (priv->lanes[i] > 1) in rockchip_p3phy_rk3588_init()
268 priv->num_lanes = of_property_read_variable_u32_array(dev->of_node, "data-lanes", in rockchip_p3phy_probe()
269 priv->lanes, 2, in rockchip_p3phy_probe()
270 ARRAY_SIZE(priv->lanes)); in rockchip_p3phy_probe()
272 /* if no data-lanes assume aggregation */ in rockchip_p3phy_probe()
274 dev_dbg(dev, "no data-lanes property found\n"); in rockchip_p3phy_probe()
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/pinctrl/
Dnvidia,tegra124-xusb-padctl.txt10 The Tegra XUSB pad controller manages a set of lanes, each of which can be
40 Each subnode describes groups of lanes along with parameters and pads that
54 - nvidia,lanes: An array of strings. Each string is the name of a lane.
62 Note that not all of these properties are valid for all lanes. Lanes can be
117 nvidia,lanes = "pcie-0", "pcie-1";
123 nvidia,lanes = "pcie-2", "pcie-3",
130 nvidia,lanes = "sata-0";

12345678910>>...32