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/Linux-v5.4/drivers/staging/media/omap4iss/
Diss_csiphy.c21 * csiphy_lanes_config - Configuration of CSIPHY lanes.
36 reg |= (phy->lanes.data[i].pol ? in csiphy_lanes_config()
38 reg |= (phy->lanes.data[i].pos << in csiphy_lanes_config()
44 reg |= phy->lanes.clk.pol ? CSI2_COMPLEXIO_CFG_CLOCK_POL : 0; in csiphy_lanes_config()
45 reg |= phy->lanes.clk.pos << CSI2_COMPLEXIO_CFG_CLOCK_POSITION_SHIFT; in csiphy_lanes_config()
123 struct iss_csiphy_lanes_cfg *lanes; in omap4iss_csiphy_config() local
128 lanes = &subdevs->bus.csi2.lanecfg; in omap4iss_csiphy_config()
150 /* Enable all lanes for now */ in omap4iss_csiphy_config()
161 /* Enable all lanes for now */ in omap4iss_csiphy_config()
173 /* Clock and data lanes verification */ in omap4iss_csiphy_config()
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/Linux-v5.4/drivers/gpu/drm/bridge/adv7511/
Dadv7533.c32 u8 clock_div_by_lanes[] = { 6, 4, 3 }; /* 2, 3, 4 lanes */ in adv7511_dsi_config_timing_gen()
43 clock_div_by_lanes[dsi->lanes - 2] << 3); in adv7511_dsi_config_timing_gen()
73 /* set number of dsi lanes */ in adv7533_dsi_power_on()
74 regmap_write(adv->regmap_cec, 0x1c, dsi->lanes << 4); in adv7533_dsi_power_on()
106 int lanes, ret; in adv7533_mode_set() local
112 lanes = 4; in adv7533_mode_set()
114 lanes = 3; in adv7533_mode_set()
116 if (lanes != dsi->lanes) { in adv7533_mode_set()
118 dsi->lanes = lanes; in adv7533_mode_set()
121 dev_err(&dsi->dev, "failed to change host lanes\n"); in adv7533_mode_set()
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/Linux-v5.4/drivers/media/platform/omap3isp/
Dispcsiphy.c166 struct isp_csiphy_lanes_cfg *lanes; in omap3isp_csiphy_config() local
174 lanes = &buscfg->bus.ccp2.lanecfg; in omap3isp_csiphy_config()
177 lanes = &buscfg->bus.csi2.lanecfg; in omap3isp_csiphy_config()
184 /* Clock and data lanes verification */ in omap3isp_csiphy_config()
186 if (lanes->data[i].pol > 1 || lanes->data[i].pos > 3) in omap3isp_csiphy_config()
189 if (used_lanes & (1 << lanes->data[i].pos)) in omap3isp_csiphy_config()
192 used_lanes |= 1 << lanes->data[i].pos; in omap3isp_csiphy_config()
195 if (lanes->clk.pol > 1 || lanes->clk.pos > 3) in omap3isp_csiphy_config()
198 if (lanes->clk.pos == 0 || used_lanes & (1 << lanes->clk.pos)) in omap3isp_csiphy_config()
210 /* CSI-2 is DDR and we only count used lanes. */ in omap3isp_csiphy_config()
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/Linux-v5.4/Documentation/devicetree/bindings/phy/
Dnvidia,tegra124-xusb-padctl.txt4 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
7 documentation. Each such "pad" may control either one or multiple lanes,
8 and thus contains any logic common to all its lanes. Each lane can be
11 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
12 super-speed USB. Other lanes are for various types of low-speed, full-speed
15 ports (e.g. PCIe) and the lanes.
75 the pad and any of its lanes, this property must be set to "okay".
122 Each pad node has a child named "lanes" that contains one or more children of
123 its own, each representing one of the lanes controlled by the pad.
259 lanes {
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Dphy-cadence-sierra.txt26 Each group of PHY lanes with a single master lane should be represented as
39 - cdns,num-lanes: Number of lanes in this group. From 1 to 4. The
40 group is made up of consecutive lanes.
42 configuration of lanes.
57 cdns,num-lanes = <2>;
64 cdns,num-lanes = <1>;
/Linux-v5.4/drivers/gpu/drm/omapdrm/dss/
Dhdmi_common.c18 prop = of_find_property(ep, "lanes", &len); in hdmi_parse_lanes_of()
20 u32 lanes[8]; in hdmi_parse_lanes_of() local
22 if (len / sizeof(u32) != ARRAY_SIZE(lanes)) { in hdmi_parse_lanes_of()
23 dev_err(&pdev->dev, "bad number of lanes\n"); in hdmi_parse_lanes_of()
27 r = of_property_read_u32_array(ep, "lanes", lanes, in hdmi_parse_lanes_of()
28 ARRAY_SIZE(lanes)); in hdmi_parse_lanes_of()
34 r = hdmi_phy_parse_lanes(phy, lanes); in hdmi_parse_lanes_of()
/Linux-v5.4/drivers/video/fbdev/omap2/omapfb/dss/
Dhdmi_common.c18 prop = of_find_property(ep, "lanes", &len); in hdmi_parse_lanes_of()
20 u32 lanes[8]; in hdmi_parse_lanes_of() local
22 if (len / sizeof(u32) != ARRAY_SIZE(lanes)) { in hdmi_parse_lanes_of()
23 dev_err(&pdev->dev, "bad number of lanes\n"); in hdmi_parse_lanes_of()
27 r = of_property_read_u32_array(ep, "lanes", lanes, in hdmi_parse_lanes_of()
28 ARRAY_SIZE(lanes)); in hdmi_parse_lanes_of()
34 r = hdmi_phy_parse_lanes(phy, lanes); in hdmi_parse_lanes_of()
/Linux-v5.4/Documentation/devicetree/bindings/pci/
Dnvidia,tegra20-pcie.txt104 - If lanes 0 to 3 are used:
107 - If lanes 4 or 5 are used:
160 - nvidia,num-lanes: Number of lanes to use for this port. Valid combinations
162 - Root port 0 uses 4 lanes, root port 1 is unused.
163 - Both root ports use 2 lanes.
169 number of lanes in the nvidia,num-lanes property. Entries are of the form
170 "pcie-N": where N ranges from 0 to the value specified in nvidia,num-lanes.
222 nvidia,num-lanes = <2>;
236 nvidia,num-lanes = <2>;
328 nvidia,num-lanes = <2>;
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/Linux-v5.4/drivers/gpu/drm/amd/powerplay/hwmgr/
Dpppcielanes.c33 /* For converting from number of lanes to lane bits. */
37 2, /* 2 Lanes */
39 3, /* 4 Lanes */
43 4, /* 8 Lanes */
47 5, /* 12 Lanes (Not actually supported) */
51 6 /* 16 Lanes */
/Linux-v5.4/Documentation/devicetree/bindings/media/i2c/
Dadv748x.txt52 endpoint. Each of those endpoints shall contain the data-lanes property as
56 - data-lanes: an array of physical data lane indexes
58 sources are described. For TXA 1, 2 or 4 data lanes can be described
101 clock-lanes = <0>;
102 data-lanes = <1 2 3 4>;
111 clock-lanes = <0>;
112 data-lanes = <1>;
Dov2680.txt22 - clock-lanes: should be set to <0> (clock lane on hardware lane 0).
23 - data-lanes: should be set to <1> (one CSI-2 lane supported).
41 clock-lanes = <0>;
42 data-lanes = <1>;
Dtc358743.txt16 - data-lanes: should be <1 2 3 4> for four-lane operation,
18 - clock-lanes: should be <0>
42 data-lanes = <1 2 3 4>;
43 clock-lanes = <0>;
Dov5640.txt29 - clock-lanes: should be set to <0> (clock lane on hardware lane 0)
30 - data-lanes: should be set to <1> or <1 2> (one or two CSI-2 lanes supported)
64 clock-lanes = <0>;
65 data-lanes = <1 2>;
/Linux-v5.4/Documentation/devicetree/bindings/pinctrl/
Dnvidia,tegra124-xusb-padctl.txt10 The Tegra XUSB pad controller manages a set of lanes, each of which can be
40 Each subnode describes groups of lanes along with parameters and pads that
54 - nvidia,lanes: An array of strings. Each string is the name of a lane.
62 Note that not all of these properties are valid for all lanes. Lanes can be
117 nvidia,lanes = "pcie-0", "pcie-1";
123 nvidia,lanes = "pcie-2", "pcie-3",
130 nvidia,lanes = "sata-0";
/Linux-v5.4/drivers/phy/tegra/
Dxusb.c35 if (!pad->lanes[i]) in tegra_xusb_pad_of_xlate()
38 if (pad->lanes[i]->dev.of_node == args->np) { in tegra_xusb_pad_of_xlate()
39 phy = pad->lanes[i]; in tegra_xusb_pad_of_xlate()
91 struct device_node *np, *lanes; in tegra_xusb_pad_find_phy_node() local
93 lanes = of_get_child_by_name(pad->dev.of_node, "lanes"); in tegra_xusb_pad_find_phy_node()
94 if (!lanes) in tegra_xusb_pad_find_phy_node()
97 np = of_get_child_by_name(lanes, pad->soc->lanes[index].name); in tegra_xusb_pad_find_phy_node()
98 of_node_put(lanes); in tegra_xusb_pad_find_phy_node()
183 children = of_get_child_by_name(pad->dev.of_node, "lanes"); in tegra_xusb_pad_register()
187 pad->lanes = devm_kcalloc(&pad->dev, pad->soc->num_lanes, sizeof(lane), in tegra_xusb_pad_register()
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/Linux-v5.4/drivers/net/ethernet/netronome/nfp/
Dnfp_devlink.c40 nfp_devlink_set_lanes(struct nfp_pf *pf, unsigned int idx, unsigned int lanes) in nfp_devlink_set_lanes() argument
49 ret = __nfp_eth_set_split(nsp, lanes); in nfp_devlink_set_lanes()
70 unsigned int lanes; in nfp_devlink_port_split() local
90 lanes = eth_port.port_lanes / count; in nfp_devlink_port_split()
91 if (eth_port.lanes == 10 && count == 2) in nfp_devlink_port_split()
92 lanes = 8 / count; in nfp_devlink_port_split()
94 ret = nfp_devlink_set_lanes(pf, eth_port.index, lanes); in nfp_devlink_port_split()
107 unsigned int lanes; in nfp_devlink_port_unsplit() local
124 lanes = eth_port.port_lanes; in nfp_devlink_port_unsplit()
126 lanes = 10; in nfp_devlink_port_unsplit()
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/Linux-v5.4/Documentation/devicetree/bindings/media/
Dvideo-interfaces.txt125 - data-lanes: an array of physical data lane indexes. Position of an entry
128 "data-lanes = <1 2>;", assuming the clock lane is on hardware lane 0.
133 - clock-lanes: an array of physical clock lane indexes. Position of an entry
135 physical lane, e.g. for a MIPI CSI-2 bus we could have "clock-lanes = <0>;",
144 - lane-polarities: an array of polarities of the lanes starting from the clock
145 lane and followed by the data lanes in the same order as in data-lanes.
147 should be the combined length of data-lanes and clock-lanes properties.
242 clock-lanes = <0>;
243 data-lanes = <1 2>;
263 clock-lanes = <0>;
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Dsamsung-mipi-csis.txt13 - bus-width : maximum number of data lanes supported (SoC specific);
42 - data-lanes : (required) an array specifying active physical MIPI-CSI2
43 data input lanes and their mapping to logical lanes; the
77 data-lanes = <1>, <2>;
/Linux-v5.4/tools/perf/pmu-events/arch/x86/skylakex/
Duncore-other.json452 …ed to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the b…
464 …d refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes s…
476 … any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes s…
488 …refer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes
500 …ed to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the b…
512 …d refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes s…
524 … any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes s…
536 …brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes
548 …ed to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the b…
560 …d refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes s…
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/Linux-v5.4/drivers/media/platform/cadence/
Dcdns-csi2rx.c73 u8 lanes[CSI2RX_LANES_MAX]; member
120 reg |= CSI2RX_STATIC_CFG_DLANE_MAP(i, csi2rx->lanes[i]); in csi2rx_start()
121 set_bit(csi2rx->lanes[i], &lanes_used); in csi2rx_start()
125 * Even the unused lanes need to be mapped. In order to avoid in csi2rx_start()
126 * to map twice to the same physical lane, keep the lanes used in csi2rx_start()
127 * in the previous loop, and only map unused physical lanes to in csi2rx_start()
128 * the rest of our logical lanes. in csi2rx_start()
325 dev_err(&pdev->dev, "Invalid number of lanes: %u\n", in csi2rx_get_resources()
388 memcpy(csi2rx->lanes, v4l2_ep.bus.mipi_csi2.data_lanes, in csi2rx_parse_dt()
389 sizeof(csi2rx->lanes)); in csi2rx_parse_dt()
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/Linux-v5.4/drivers/pci/controller/
Dpcie-rockchip.c58 rockchip->lanes = 1; in rockchip_pcie_parse_dt()
59 err = of_property_read_u32(node, "num-lanes", &rockchip->lanes); in rockchip_pcie_parse_dt()
60 if (!err && (rockchip->lanes == 0 || in rockchip_pcie_parse_dt()
61 rockchip->lanes == 3 || in rockchip_pcie_parse_dt()
62 rockchip->lanes > 4)) { in rockchip_pcie_parse_dt()
63 dev_warn(dev, "invalid num-lanes, default to use one lane\n"); in rockchip_pcie_parse_dt()
64 rockchip->lanes = 1; in rockchip_pcie_parse_dt()
241 PCIE_CLIENT_CONF_LANE_NUM(rockchip->lanes); in rockchip_pcie_init_port()
345 /* inactive lanes are already powered off */ in rockchip_pcie_deinit_phys()
/Linux-v5.4/arch/arm64/boot/dts/nvidia/
Dtegra186-p2771-0000.dts133 lanes {
154 lanes {
198 phys = <&{/padctl@3520000/pads/usb2/lanes/usb2-0}>,
199 <&{/padctl@3520000/pads/usb2/lanes/usb2-1}>,
200 <&{/padctl@3520000/pads/usb3/lanes/usb3-0}>;
226 nvidia,num-lanes = <4>;
231 nvidia,num-lanes = <0>;
236 nvidia,num-lanes = <1>;
Dtegra210-p2371-2180.dts22 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>,
23 <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
24 <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>,
25 <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>;
31 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
/Linux-v5.4/drivers/nubus/
Dproc.c73 int lanes = board->lanes; in nubus_proc_add_rsrc_dir() local
78 return proc_mkdir_data(name, 0555, procdir, (void *)lanes); in nubus_proc_add_rsrc_dir()
120 int lanes = (int)proc_get_parent_data(inode); in nubus_proc_rsrc_show() local
123 if (!lanes) in nubus_proc_rsrc_show()
126 ent.mask = lanes; in nubus_proc_rsrc_show()
/Linux-v5.4/drivers/gpu/drm/rockchip/
Dcdn-dp-core.c147 u8 lanes; in cdn_dp_get_port_lanes() local
154 lanes = 2; in cdn_dp_get_port_lanes()
156 lanes = 4; in cdn_dp_get_port_lanes()
158 lanes = 0; in cdn_dp_get_port_lanes()
161 return lanes; in cdn_dp_get_port_lanes()
181 int i, lanes; in cdn_dp_connected_port() local
185 lanes = cdn_dp_get_port_lanes(port); in cdn_dp_connected_port()
186 if (lanes) in cdn_dp_connected_port()
283 u8 lanes, bpc; in cdn_dp_connector_mode_valid() local
303 source_max = dp->lanes; in cdn_dp_connector_mode_valid()
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