Home
last modified time | relevance | path

Searched full:lanes (Results 1 – 25 of 570) sorted by relevance

12345678910>>...23

/Linux-v5.10/drivers/staging/media/omap4iss/
Diss_csiphy.c21 * csiphy_lanes_config - Configuration of CSIPHY lanes.
36 reg |= (phy->lanes.data[i].pol ? in csiphy_lanes_config()
38 reg |= (phy->lanes.data[i].pos << in csiphy_lanes_config()
44 reg |= phy->lanes.clk.pol ? CSI2_COMPLEXIO_CFG_CLOCK_POL : 0; in csiphy_lanes_config()
45 reg |= phy->lanes.clk.pos << CSI2_COMPLEXIO_CFG_CLOCK_POSITION_SHIFT; in csiphy_lanes_config()
123 struct iss_csiphy_lanes_cfg *lanes; in omap4iss_csiphy_config() local
128 lanes = &subdevs->bus.csi2.lanecfg; in omap4iss_csiphy_config()
150 /* Enable all lanes for now */ in omap4iss_csiphy_config()
161 /* Enable all lanes for now */ in omap4iss_csiphy_config()
173 /* Clock and data lanes verification */ in omap4iss_csiphy_config()
[all …]
/Linux-v5.10/tools/testing/selftests/net/
Ddevlink_port_split.py12 # Test port split configuration using devlink-port lanes attribute.
73 Get the $port's maximum number of lanes.
74 Return: number of lanes, e.g. 1, 2, 4 and 8.
82 if 'lanes' in values:
83 lanes = values['lanes']
85 lanes = 0
86 return lanes
146 def exists_and_lanes(ports, lanes, dev): argument
149 $lanes number of lanes after splitting.
158 if max_lanes != lanes:
[all …]
/Linux-v5.10/drivers/gpu/drm/bridge/adv7511/
Dadv7533.c32 u8 clock_div_by_lanes[] = { 6, 4, 3 }; /* 2, 3, 4 lanes */ in adv7511_dsi_config_timing_gen()
43 clock_div_by_lanes[dsi->lanes - 2] << 3); in adv7511_dsi_config_timing_gen()
73 /* set number of dsi lanes */ in adv7533_dsi_power_on()
74 regmap_write(adv->regmap_cec, 0x1c, dsi->lanes << 4); in adv7533_dsi_power_on()
106 int lanes, ret; in adv7533_mode_set() local
112 lanes = 4; in adv7533_mode_set()
114 lanes = 3; in adv7533_mode_set()
116 if (lanes != dsi->lanes) { in adv7533_mode_set()
118 dsi->lanes = lanes; in adv7533_mode_set()
121 dev_err(&dsi->dev, "failed to change host lanes\n"); in adv7533_mode_set()
[all …]
/Linux-v5.10/tools/perf/pmu-events/arch/x86/skylakex/
Duncore-other.json557 …ed to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the b…
569 …d refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes s…
581 … any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes s…
593 …refer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes
605 …ed to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the b…
617 …d refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes s…
629 … any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes s…
641 …brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes
653 …ed to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the b…
665 …d refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes s…
[all …]
/Linux-v5.10/tools/perf/pmu-events/arch/x86/cascadelakex/
Duncore-other.json578 …ed to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the b…
590 …d refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes s…
602 … any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes s…
614 …refer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes
626 …ed to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the b…
638 …d refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes s…
650 … any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes s…
662 …brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes
674 …ed to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the b…
686 …d refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes s…
[all …]
/Linux-v5.10/drivers/media/platform/omap3isp/
Dispcsiphy.c166 struct isp_csiphy_lanes_cfg *lanes; in omap3isp_csiphy_config() local
174 lanes = &buscfg->bus.ccp2.lanecfg; in omap3isp_csiphy_config()
177 lanes = &buscfg->bus.csi2.lanecfg; in omap3isp_csiphy_config()
184 /* Clock and data lanes verification */ in omap3isp_csiphy_config()
186 if (lanes->data[i].pol > 1 || lanes->data[i].pos > 3) in omap3isp_csiphy_config()
189 if (used_lanes & (1 << lanes->data[i].pos)) in omap3isp_csiphy_config()
192 used_lanes |= 1 << lanes->data[i].pos; in omap3isp_csiphy_config()
195 if (lanes->clk.pol > 1 || lanes->clk.pos > 3) in omap3isp_csiphy_config()
198 if (lanes->clk.pos == 0 || used_lanes & (1 << lanes->clk.pos)) in omap3isp_csiphy_config()
210 /* CSI-2 is DDR and we only count used lanes. */ in omap3isp_csiphy_config()
[all …]
/Linux-v5.10/drivers/gpu/drm/tegra/
Ddp.c51 link->lanes = 0; in drm_dp_link_reset()
233 link->lanes = link->max_lanes; in drm_dp_link_probe()
346 values[1] = link->lanes; in drm_dp_link_configure()
381 * with the lowest number of lanes and the lowest possible link rate that can
393 /* available number of lanes */ in drm_dp_link_choose()
394 static const unsigned int lanes[3] = { 1, 2, 4 }; in drm_dp_link_choose() local
402 for (i = 0; i < ARRAY_SIZE(lanes) && lanes[i] <= link->max_lanes; i++) { in drm_dp_link_choose()
405 * Capacity for this combination of lanes and rate, in drm_dp_link_choose()
412 capacity = lanes[i] * (rates[j] * 10) * 8 / 10; in drm_dp_link_choose()
415 DRM_DEBUG_KMS("using %u lanes at %u kHz (%lu/%lu kbps)\n", in drm_dp_link_choose()
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/phy/
Dnvidia,tegra124-xusb-padctl.txt4 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
7 documentation. Each such "pad" may control either one or multiple lanes,
8 and thus contains any logic common to all its lanes. Each lane can be
11 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
12 super-speed USB. Other lanes are for various types of low-speed, full-speed
15 ports (e.g. PCIe) and the lanes.
80 the pad and any of its lanes, this property must be set to "okay".
127 Each pad node has a child named "lanes" that contains one or more children of
128 its own, each representing one of the lanes controlled by the pad.
283 lanes {
[all …]
Dphy-cadence-sierra.txt22 the clock to the lanes. "phy_clk" is deprecated.
29 Each group of PHY lanes with a single master lane should be represented as
42 - cdns,num-lanes: Number of lanes in this group. From 1 to 4. The
43 group is made up of consecutive lanes.
45 configuration of lanes.
60 cdns,num-lanes = <2>;
67 cdns,num-lanes = <1>;
Dphy-cadence-torrent.yaml71 Each group of PHY lanes with a single master lane should be represented as a sub-node.
83 Contains list of resets, one per lane, to get all the link lanes out of reset.
90 Specifies the type of PHY for which the group of PHY lanes is used.
96 cdns,num-lanes:
98 Number of lanes.
124 - cdns,num-lanes
166 cdns,num-lanes = <4>;
194 cdns,num-lanes = <2>;
203 cdns,num-lanes = <1>;
/Linux-v5.10/include/linux/phy/
Dphy-dp.h28 * @lanes:
30 * Number of active, consecutive, data lanes, starting from
35 unsigned int lanes; member
41 * to be used by particular lanes. One value per lane.
52 * used by particular lanes. One value per lane.
88 * and pre-emphasis to requested values. Only lanes specified
89 * by "lanes" parameter will be affected.
/Linux-v5.10/Documentation/devicetree/bindings/media/xilinx/
Dxlnx,csi2rxss.yaml88 xlnx,en-active-lanes:
91 Present if the number of active lanes can be re-configured at
92 runtime in the Protocol Configuration Register. Otherwise all lanes,
118 data-lanes:
124 1 2 - For 2 lanes enabled in IP.
125 1 2 3 - For 3 lanes enabled in IP.
126 1 2 3 4 - For 4 lanes enabled in IP.
136 - data-lanes
207 xlnx,en-active-lanes;
222 data-lanes = <1 2 3 4>;
/Linux-v5.10/drivers/video/fbdev/omap2/omapfb/dss/
Dhdmi_common.c18 prop = of_find_property(ep, "lanes", &len); in hdmi_parse_lanes_of()
20 u32 lanes[8]; in hdmi_parse_lanes_of() local
22 if (len / sizeof(u32) != ARRAY_SIZE(lanes)) { in hdmi_parse_lanes_of()
23 dev_err(&pdev->dev, "bad number of lanes\n"); in hdmi_parse_lanes_of()
27 r = of_property_read_u32_array(ep, "lanes", lanes, in hdmi_parse_lanes_of()
28 ARRAY_SIZE(lanes)); in hdmi_parse_lanes_of()
34 r = hdmi_phy_parse_lanes(phy, lanes); in hdmi_parse_lanes_of()
/Linux-v5.10/drivers/gpu/drm/omapdrm/dss/
Dhdmi_common.c18 prop = of_find_property(ep, "lanes", &len); in hdmi_parse_lanes_of()
20 u32 lanes[8]; in hdmi_parse_lanes_of() local
22 if (len / sizeof(u32) != ARRAY_SIZE(lanes)) { in hdmi_parse_lanes_of()
23 dev_err(&pdev->dev, "bad number of lanes\n"); in hdmi_parse_lanes_of()
27 r = of_property_read_u32_array(ep, "lanes", lanes, in hdmi_parse_lanes_of()
28 ARRAY_SIZE(lanes)); in hdmi_parse_lanes_of()
34 r = hdmi_phy_parse_lanes(phy, lanes); in hdmi_parse_lanes_of()
/Linux-v5.10/Documentation/devicetree/bindings/pci/
Dnvidia,tegra20-pcie.txt104 - If lanes 0 to 3 are used:
107 - If lanes 4 or 5 are used:
148 - nvidia,num-lanes: Number of lanes to use for this port. Valid combinations
150 - Root port 0 uses 4 lanes, root port 1 is unused.
151 - Both root ports use 2 lanes.
157 number of lanes in the nvidia,num-lanes property. Entries are of the form
158 "pcie-N": where N ranges from 0 to the value specified in nvidia,num-lanes.
210 nvidia,num-lanes = <2>;
224 nvidia,num-lanes = <2>;
316 nvidia,num-lanes = <2>;
[all …]
/Linux-v5.10/arch/arm64/boot/dts/renesas/
Dr8a774c0-ek874-mipi-2.1.dts37 clock-lanes = <0>;
38 data-lanes = <1 2>;
51 clock-lanes = <0>;
52 data-lanes = <1 2>;
61 clock-lanes = <0>;
62 data-lanes = <1 2>;
/Linux-v5.10/Documentation/devicetree/bindings/media/
Dti,cal.yaml97 clock-lanes:
100 data-lanes:
124 clock-lanes:
127 data-lanes:
173 clock-lanes = <0>;
174 data-lanes = <1 2>;
195 clock-lanes = <0>;
196 data-lanes = <1 2>;
Drenesas,csi2.yaml69 clock-lanes:
72 data-lanes:
78 - clock-lanes
79 - data-lanes
153 clock-lanes = <0>;
154 data-lanes = <1>;
Dsamsung-mipi-csis.txt13 - bus-width : maximum number of data lanes supported (SoC specific);
42 - data-lanes : (required) an array specifying active physical MIPI-CSI2
43 data input lanes and their mapping to logical lanes; the
77 data-lanes = <1>, <2>;
/Linux-v5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dpppcielanes.c33 /* For converting from number of lanes to lane bits. */
37 2, /* 2 Lanes */
39 3, /* 4 Lanes */
43 4, /* 8 Lanes */
47 5, /* 12 Lanes (Not actually supported) */
51 6 /* 16 Lanes */
/Linux-v5.10/Documentation/devicetree/bindings/media/i2c/
Dadv748x.txt52 endpoint. Each of those endpoints shall contain the data-lanes property as
56 - data-lanes: an array of physical data lane indexes
58 sources are described. For TXA 1, 2 or 4 data lanes can be described
101 clock-lanes = <0>;
102 data-lanes = <1 2 3 4>;
111 clock-lanes = <0>;
112 data-lanes = <1>;
Dov2680.txt22 - clock-lanes: should be set to <0> (clock lane on hardware lane 0).
23 - data-lanes: should be set to <1> (one CSI-2 lane supported).
41 clock-lanes = <0>;
42 data-lanes = <1>;
/Linux-v5.10/arch/arm64/boot/dts/marvell/
Dcn9132-db.dts67 * lanes not being connected. Prevent the port for being
108 /* Generic PHY, providing serdes lanes */
156 num-lanes = <2>;
158 /* Generic PHY, providing serdes lanes */
166 num-lanes = <1>;
168 /* Generic PHY, providing serdes lanes */
177 /* Generic PHY, providing serdes lanes */
219 /* Generic PHY, providing serdes lanes */
/Linux-v5.10/Documentation/devicetree/bindings/pinctrl/
Dnvidia,tegra124-xusb-padctl.txt10 The Tegra XUSB pad controller manages a set of lanes, each of which can be
40 Each subnode describes groups of lanes along with parameters and pads that
54 - nvidia,lanes: An array of strings. Each string is the name of a lane.
62 Note that not all of these properties are valid for all lanes. Lanes can be
117 nvidia,lanes = "pcie-0", "pcie-1";
123 nvidia,lanes = "pcie-2", "pcie-3",
130 nvidia,lanes = "sata-0";
/Linux-v5.10/drivers/net/ethernet/netronome/nfp/
Dnfp_devlink.c40 nfp_devlink_set_lanes(struct nfp_pf *pf, unsigned int idx, unsigned int lanes) in nfp_devlink_set_lanes() argument
49 ret = __nfp_eth_set_split(nsp, lanes); in nfp_devlink_set_lanes()
70 unsigned int lanes; in nfp_devlink_port_split() local
87 lanes = eth_port.port_lanes / count; in nfp_devlink_port_split()
88 if (eth_port.lanes == 10 && count == 2) in nfp_devlink_port_split()
89 lanes = 8 / count; in nfp_devlink_port_split()
91 ret = nfp_devlink_set_lanes(pf, eth_port.index, lanes); in nfp_devlink_port_split()
104 unsigned int lanes; in nfp_devlink_port_unsplit() local
121 lanes = eth_port.port_lanes; in nfp_devlink_port_unsplit()
123 lanes = 10; in nfp_devlink_port_unsplit()
[all …]

12345678910>>...23