/Linux-v5.15/Documentation/devicetree/bindings/mfd/ |
D | ti,j721e-system-controller.yaml | 75 <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */ 76 <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */ 77 <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */ 78 <0x40b0 0x3>, <0x40b4 0x3>, /* SERDES3 lane0/1 select */ 80 /* SERDES4 lane0/1/2/3 select */
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/Linux-v5.15/drivers/phy/amlogic/ |
D | phy-meson-g12a-usb3-pcie.c | 215 * LANE0.TX_ALT_BLOCK.EN_ALT_BUS to enable TX to use alt bus in phy_g12a_usb3_init() 228 * LANE0.RX_OVRD_IN_HI. RX_EQ_EN set to 0 in phy_g12a_usb3_init() 229 * LANE0.RX_OVRD_IN_HI.RX_EQ_EN_OVRD set to 1 in phy_g12a_usb3_init() 230 * LANE0.RX_OVRD_IN_HI.RX_EQ set to 3 in phy_g12a_usb3_init() 231 * LANE0.RX_OVRD_IN_HI.RX_EQ_OVRD set to 1 in phy_g12a_usb3_init() 248 * LANE0.TX_OVRD_DRV_LO.PREEMPH set to 22 in phy_g12a_usb3_init() 249 * LANE0.TX_OVRD_DRV_LO.AMPLITUDE set to 127 in phy_g12a_usb3_init() 250 * LANE0.TX_OVRD_DRV_LO.EN set to 1. in phy_g12a_usb3_init()
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/Linux-v5.15/drivers/phy/qualcomm/ |
D | phy-qcom-ipq806x-usb.c | 345 * LANE0.TX_ALT_BLOCK.EN_ALT_BUS to enable TX to use alt bus mode in qcom_ipq806x_usb_ss_phy_init() 368 * LANE0.RX_OVRD_IN_HI. RX_EQ_EN set to 0 in qcom_ipq806x_usb_ss_phy_init() 369 * LANE0.RX_OVRD_IN_HI.RX_EQ_EN_OVRD set to 1 in qcom_ipq806x_usb_ss_phy_init() 370 * LANE0.RX_OVRD_IN_HI.RX_EQ set based on SoC version in qcom_ipq806x_usb_ss_phy_init() 371 * LANE0.RX_OVRD_IN_HI.RX_EQ_OVRD set to 1 in qcom_ipq806x_usb_ss_phy_init() 389 * LANE0.TX_OVRD_DRV_LO.PREEMPH set based on SoC version in qcom_ipq806x_usb_ss_phy_init() 390 * LANE0.TX_OVRD_DRV_LO.AMPLITUDE set to 110 in qcom_ipq806x_usb_ss_phy_init() 391 * LANE0.TX_OVRD_DRV_LO.EN set to 1. in qcom_ipq806x_usb_ss_phy_init()
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/Linux-v5.15/Documentation/devicetree/bindings/pci/ |
D | pci-armada8k.txt | 25 Must be "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy" for
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/Linux-v5.15/arch/arm64/boot/dts/marvell/ |
D | armada-8040-mcbin.dtsi | 188 phy-names = "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy",
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D | armada-8040-puzzle-m801.dts | 521 phy-names = "cp1-pcie0-x2-lane0-phy", "cp1-pcie0-x2-lane1-phy";
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/Linux-v5.15/drivers/gpu/drm/amd/display/include/ |
D | grph_object_ctrl_defs.h | 242 uint8_t lane0:2; /* Mapping for lane 0 */ member
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/Linux-v5.15/arch/arm64/boot/dts/ti/ |
D | k3-j721e-main.dtsi | 49 mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */ 50 <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */ 51 <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */ 52 <0x40b0 0x3>, <0x40b4 0x3>, /* SERDES3 lane0/1 select */ 54 /* SERDES4 lane0/1/2/3 select */
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D | k3-j7200-main.dtsi | 38 mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
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D | k3-am64-main.dtsi | 50 mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */
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/Linux-v5.15/drivers/phy/rockchip/ |
D | phy-rockchip-dphy-rx0.c | 211 /* HS RX Control of lane0 */ in rk_dphy_enable()
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/Linux-v5.15/drivers/net/ethernet/ti/ |
D | netcp_xgbepcsr.c | 258 /* For 2 lane Phy-B, lane0 is actually lane1 */ in netcp_xgbe_serdes_write_tbus_addr()
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/Linux-v5.15/drivers/scsi/ufs/ |
D | ufs-hisi.c | 60 dev_err(hba->dev, "%s: invalid TX_FSM_STATE, lane0 = %d, lane1 = %d\n", in ufs_hisi_check_hibern8()
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/Linux-v5.15/arch/arm64/boot/dts/qcom/ |
D | ipq6018.dtsi | 407 <0x0 0x84800 0x0 0x4f4>; /* PCS: Lane0, COM, PCIE */
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D | msm8996.dtsi | 611 reset-names = "lane0";
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/Linux-v5.15/drivers/phy/samsung/ |
D | phy-exynos5-usbdrd.c | 656 * register LANE0.TX_DEBUG which is internal to PHY. in exynos5420_usbdrd_phy_calibrate()
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/Linux-v5.15/drivers/ata/ |
D | ahci_imx.c | 40 /* Lane0 Output Status Register */
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/Linux-v5.15/drivers/gpu/drm/rockchip/ |
D | dw-mipi-dsi-rockchip.c | 1218 * Set clock lane and hsfreqrange by lane0(test code 0x44) in dw_mipi_dsi_dphy_power_on()
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/Linux-v5.15/drivers/gpu/drm/amd/display/dc/core/ |
D | dc_link_dp.c | 1517 lt_result = "CR failed lane0"; in print_status_message()
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/Linux-v5.15/drivers/gpu/drm/omapdrm/dss/ |
D | dsi.c | 1462 /* return bitmask of enabled lanes, lane0 being the lsb */
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/Linux-v5.15/drivers/video/fbdev/omap2/omapfb/dss/ |
D | dsi.c | 2040 /* return bitmask of enabled lanes, lane0 being the lsb */
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/Linux-v5.15/drivers/gpu/drm/radeon/ |
D | atombios.h | 4114 //Bit[5:4]: Define which pin connect to DVI connector data Lane0, =0: source from GPU pin TX0, =1: …
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/Linux-v5.15/drivers/gpu/drm/amd/include/ |
D | atombios.h | 4606 //Bit[5:4]: Define which pin connect to DVI connector data Lane0, =0: source from GPU pin TX0, =1: …
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