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/Linux-v5.15/Documentation/devicetree/bindings/mfd/
Dti,j721e-system-controller.yaml75 <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
76 <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */
77 <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */
78 <0x40b0 0x3>, <0x40b4 0x3>, /* SERDES3 lane0/1 select */
80 /* SERDES4 lane0/1/2/3 select */
/Linux-v5.15/drivers/phy/amlogic/
Dphy-meson-g12a-usb3-pcie.c215 * LANE0.TX_ALT_BLOCK.EN_ALT_BUS to enable TX to use alt bus in phy_g12a_usb3_init()
228 * LANE0.RX_OVRD_IN_HI. RX_EQ_EN set to 0 in phy_g12a_usb3_init()
229 * LANE0.RX_OVRD_IN_HI.RX_EQ_EN_OVRD set to 1 in phy_g12a_usb3_init()
230 * LANE0.RX_OVRD_IN_HI.RX_EQ set to 3 in phy_g12a_usb3_init()
231 * LANE0.RX_OVRD_IN_HI.RX_EQ_OVRD set to 1 in phy_g12a_usb3_init()
248 * LANE0.TX_OVRD_DRV_LO.PREEMPH set to 22 in phy_g12a_usb3_init()
249 * LANE0.TX_OVRD_DRV_LO.AMPLITUDE set to 127 in phy_g12a_usb3_init()
250 * LANE0.TX_OVRD_DRV_LO.EN set to 1. in phy_g12a_usb3_init()
/Linux-v5.15/drivers/phy/qualcomm/
Dphy-qcom-ipq806x-usb.c345 * LANE0.TX_ALT_BLOCK.EN_ALT_BUS to enable TX to use alt bus mode in qcom_ipq806x_usb_ss_phy_init()
368 * LANE0.RX_OVRD_IN_HI. RX_EQ_EN set to 0 in qcom_ipq806x_usb_ss_phy_init()
369 * LANE0.RX_OVRD_IN_HI.RX_EQ_EN_OVRD set to 1 in qcom_ipq806x_usb_ss_phy_init()
370 * LANE0.RX_OVRD_IN_HI.RX_EQ set based on SoC version in qcom_ipq806x_usb_ss_phy_init()
371 * LANE0.RX_OVRD_IN_HI.RX_EQ_OVRD set to 1 in qcom_ipq806x_usb_ss_phy_init()
389 * LANE0.TX_OVRD_DRV_LO.PREEMPH set based on SoC version in qcom_ipq806x_usb_ss_phy_init()
390 * LANE0.TX_OVRD_DRV_LO.AMPLITUDE set to 110 in qcom_ipq806x_usb_ss_phy_init()
391 * LANE0.TX_OVRD_DRV_LO.EN set to 1. in qcom_ipq806x_usb_ss_phy_init()
/Linux-v5.15/Documentation/devicetree/bindings/pci/
Dpci-armada8k.txt25 Must be "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy" for
/Linux-v5.15/arch/arm64/boot/dts/marvell/
Darmada-8040-mcbin.dtsi188 phy-names = "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy",
Darmada-8040-puzzle-m801.dts521 phy-names = "cp1-pcie0-x2-lane0-phy", "cp1-pcie0-x2-lane1-phy";
/Linux-v5.15/drivers/gpu/drm/amd/display/include/
Dgrph_object_ctrl_defs.h242 uint8_t lane0:2; /* Mapping for lane 0 */ member
/Linux-v5.15/arch/arm64/boot/dts/ti/
Dk3-j721e-main.dtsi49 mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
50 <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */
51 <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */
52 <0x40b0 0x3>, <0x40b4 0x3>, /* SERDES3 lane0/1 select */
54 /* SERDES4 lane0/1/2/3 select */
Dk3-j7200-main.dtsi38 mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
Dk3-am64-main.dtsi50 mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */
/Linux-v5.15/drivers/phy/rockchip/
Dphy-rockchip-dphy-rx0.c211 /* HS RX Control of lane0 */ in rk_dphy_enable()
/Linux-v5.15/drivers/net/ethernet/ti/
Dnetcp_xgbepcsr.c258 /* For 2 lane Phy-B, lane0 is actually lane1 */ in netcp_xgbe_serdes_write_tbus_addr()
/Linux-v5.15/drivers/scsi/ufs/
Dufs-hisi.c60 dev_err(hba->dev, "%s: invalid TX_FSM_STATE, lane0 = %d, lane1 = %d\n", in ufs_hisi_check_hibern8()
/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dipq6018.dtsi407 <0x0 0x84800 0x0 0x4f4>; /* PCS: Lane0, COM, PCIE */
Dmsm8996.dtsi611 reset-names = "lane0";
/Linux-v5.15/drivers/phy/samsung/
Dphy-exynos5-usbdrd.c656 * register LANE0.TX_DEBUG which is internal to PHY. in exynos5420_usbdrd_phy_calibrate()
/Linux-v5.15/drivers/ata/
Dahci_imx.c40 /* Lane0 Output Status Register */
/Linux-v5.15/drivers/gpu/drm/rockchip/
Ddw-mipi-dsi-rockchip.c1218 * Set clock lane and hsfreqrange by lane0(test code 0x44) in dw_mipi_dsi_dphy_power_on()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/core/
Ddc_link_dp.c1517 lt_result = "CR failed lane0"; in print_status_message()
/Linux-v5.15/drivers/gpu/drm/omapdrm/dss/
Ddsi.c1462 /* return bitmask of enabled lanes, lane0 being the lsb */
/Linux-v5.15/drivers/video/fbdev/omap2/omapfb/dss/
Ddsi.c2040 /* return bitmask of enabled lanes, lane0 being the lsb */
/Linux-v5.15/drivers/gpu/drm/radeon/
Datombios.h4114 //Bit[5:4]: Define which pin connect to DVI connector data Lane0, =0: source from GPU pin TX0, =1: …
/Linux-v5.15/drivers/gpu/drm/amd/include/
Datombios.h4606 //Bit[5:4]: Define which pin connect to DVI connector data Lane0, =0: source from GPU pin TX0, =1: …