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/Linux-v5.10/Documentation/devicetree/bindings/display/bridge/
Dti,sn65dsi86.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sandeep Panda <spanda@codeaurora.org>
23 enable-gpios:
27 suspend-gpios:
31 no-hpd:
37 vccio-supply:
40 vpll-supply:
43 vcca-supply:
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/Linux-v5.10/arch/arm64/boot/dts/qcom/
Dsc7180-trogdor-lazor-r0.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "sc7180-trogdor-lazor.dtsi"
14 compatible = "google,lazor-rev0", "qcom,sc7180";
19 * Lane 0 was incorrectly mapped on the cable, but we've now decided
20 * that the cable is canon and in -rev1+ we'll make a board change
23 lane-polarities = <1 0>;
/Linux-v5.10/Documentation/devicetree/bindings/media/i2c/
Dst,st-mipid02.txt1 STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge
3 MIPID02 has two CSI-2 input ports, only one of those ports can be active at a
4 time. Active port input stream will be de-serialized and its content outputted
6 CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2 second
7 input port is a single lane 800Mbps. Both ports support clock and data lane
8 polarity swap. First port also supports data lane swap.
11 YUV420 8-bit, YUV422 8-bit and YUV420 10-bit.
14 - compatible: shall be "st,st-mipid02"
15 - clocks: reference to the xclk input clock.
16 - clock-names: shall be "xclk".
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/Linux-v5.10/drivers/media/i2c/
Dst-mipid02.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for ST MIPID02 CSI-2 to PARALLEL bridge
19 #include <media/v4l2-async.h>
20 #include <media/v4l2-ctrls.h>
21 #include <media/v4l2-device.h>
22 #include <media/v4l2-fwnode.h>
23 #include <media/v4l2-subdev.h>
181 fmt->code = MEDIA_BUS_FMT_SBGGR8_1X8; in init_format()
182 fmt->field = V4L2_FIELD_NONE; in init_format()
183 fmt->colorspace = V4L2_COLORSPACE_SRGB; in init_format()
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/Linux-v5.10/Documentation/devicetree/bindings/media/
Dvideo-interfaces.txt4 ---------------
21 #address-cells = <1>;
22 #size-cells = <0>;
37 a common scheme using '#address-cells', '#size-cells' and 'reg' properties is
41 specify #address-cells, #size-cells properties independently for the 'port'
44 Two 'endpoint' nodes are linked with each other through their 'remote-endpoint'
53 a device is partitioned into multiple data busses, e.g. 16-bit input port
54 divided into two separate ITU-R BT.656 8-bit busses. In such case bus-width
55 and data-shift properties can be used to assign physical data lines to each
59 --------------------------------
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Dti,omap3isp.txt4 The DT definitions can be found in include/dt-bindings/media/omap3-isp.h.
9 compatible : must contain "ti,omap3-isp"
17 syscon : the phandle and register offset to the Complex I/O or CSI-PHY
19 ti,phy-type : 0 -- OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. 3430)
20 1 -- OMAP3ISP_PHY_TYPE_CSIPHY (e.g. 3630)
21 #clock-cells : Must be 1 --- the ISP provides two external clocks,
24 clock bindings in ../clock/clock-bindings.txt.
27 ---------------------
30 video-interfaces.txt in the same directory.
33 0 - parallel (CCDC)
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/Linux-v5.10/arch/arm/boot/dts/
Domap3-n9.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap3-n9.dts - Device Tree file for Nokia N9
8 /dts-v1/;
10 #include "omap3-n950-n9.dtsi"
11 #include <dt-bindings/input/input.h>
15 compatible = "nokia,omap3-n9", "ti,omap3630", "ti,omap36xx", "ti,omap3";
23 vana-supply = <&vaux3>;
25 clock-frequency = <9600000>;
26 flash-leds = <&as3645a_flash &as3645a_indicator>;
29 link-frequencies = /bits/ 64 <199200000 210000000 499200000>;
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Domap3-n950.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap3-n950.dts - Device Tree file for Nokia N950
8 /dts-v1/;
10 #include "omap3-n950-n9.dtsi"
11 #include <dt-bindings/input/input.h>
15 compatible = "nokia,omap3-n950", "ti,omap3630", "ti,omap36xx", "ti,omap3";
18 compatible = "gpio-keys";
23 linux,input-type = <EV_SW>;
25 wakeup-source;
26 pinctrl-names = "default";
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/Linux-v5.10/drivers/media/v4l2-core/
Dv4l2-fwnode.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * formerly was located in v4l2-of.c.
11 * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd.
27 #include <media/v4l2-async.h>
28 #include <media/v4l2-fwnode.h>
29 #include <media/v4l2-subdev.h>
54 "MIPI CSI-2 C-PHY",
58 "MIPI CSI-1",
66 "MIPI CSI-2 D-PHY",
96 return conv ? conv->mbus_type : V4L2_MBUS_UNKNOWN; in v4l2_fwnode_bus_type_to_mbus()
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/Linux-v5.10/drivers/gpu/drm/bridge/
Dti-sn65dsi86.c1 // SPDX-License-Identifier: GPL-2.0
110 * struct ti_sn_bridge - Platform data for ti-sn65dsi86 driver.
125 * @ln_polrs: Value for the 4-bit LN_POLRS field of SN_ENH_FRAME_REG.
129 * serves double-duty of keeping track of the direction and
135 * each other's read-modify-write.
179 regmap_write(pdata->regmap, reg, val & 0xFF); in ti_sn_bridge_write_u16()
180 regmap_write(pdata->regmap, reg + 1, val >> 8); in ti_sn_bridge_write_u16()
188 ret = regulator_bulk_enable(SN_REGULATOR_SUPPLY_NUM, pdata->supplies); in ti_sn_bridge_resume()
194 gpiod_set_value(pdata->enable_gpio, 1); in ti_sn_bridge_resume()
204 gpiod_set_value(pdata->enable_gpio, 0); in ti_sn_bridge_suspend()
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Dtc358767.c1 // SPDX-License-Identifier: GPL-2.0-or-later
46 #define SUB_CFG_TYPE_CONFIG3 (2 << 2) /* LSB aligned 8-bit */
108 #define VID_MN_GEN BIT(6) /* Auto-generate M/N values */
266 /* HPD pin number (0 or 1) or -ENODEV */
292 return regmap_read_poll_timeout(tc->regmap, addr, val, in tc_poll_timeout()
310 ret = regmap_raw_write(tc->regmap, DP0_AUXWDATA(0), auxwdata, count); in tc_aux_write_data()
322 ret = regmap_raw_read(tc->regmap, DP0_AUXRDATA(0), auxrdata, count); in tc_aux_read_data()
333 u32 auxcfg0 = msg->request; in tc_auxcfg0()
336 auxcfg0 |= FIELD_PREP(DP0_AUXCFG0_BSIZE, size - 1); in tc_auxcfg0()
347 size_t size = min_t(size_t, DP_AUX_MAX_PAYLOAD_BYTES - 1, msg->size); in tc_aux_transfer()
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/Linux-v5.10/include/media/
Dv4l2-fwnode.h1 /* SPDX-License-Identifier: GPL-2.0-only */
8 * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd.
22 #include <media/v4l2-mediabus.h>
31 * struct v4l2_fwnode_bus_mipi_csi2 - MIPI CSI-2 bus data structure
33 * @data_lanes: an array of physical data lane indexes
34 * @clock_lane: physical lane index of the clock lane
48 * struct v4l2_fwnode_bus_parallel - parallel data bus data structure
60 * struct v4l2_fwnode_bus_mipi_csi1 - CSI-1/CCP2 data bus structure
62 * false - not inverted, true - inverted
63 * @strobe: false - data/clock, true - data/strobe
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