| /Linux-v5.10/Documentation/devicetree/bindings/arm/omap/ |
| D | l4.txt | 1 L4 interconnect bindings
3 These bindings describe the OMAP SoCs L4 interconnect bus.
6 - compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus
7 Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus
8 Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus
9 Should be "ti,omap4-l4-cfg" for OMAP4 family l4 cfg bus
10 Should be "ti,omap4-l4-per" for OMAP4 family l4 per bus
11 Should be "ti,omap4-l4-wkup" for OMAP4 family l4 wkup bus
12 Should be "ti,omap5-l4-cfg" for OMAP5 family l4 cfg bus
13 Should be "ti,omap5-l4-wkup" for OMAP5 family l4 wkup bus
[all …]
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| /Linux-v5.10/drivers/input/gameport/ |
| D | lightning.c | 37 struct l4 { struct
42 static struct l4 l4_ports[8]; argument
45 * l4_wait_ready() waits for the L4 to become ready.
62 struct l4 *l4 = gameport->port_data; in l4_cooked_read() local
67 outb(L4_SELECT_DIGITAL + (l4->port >> 2), L4_PORT); in l4_cooked_read()
70 outb(l4->port & 3, L4_PORT); in l4_cooked_read()
95 struct l4 *l4 = gameport->port_data; in l4_open() local
97 if (l4->port != 0 && mode != GAMEPORT_MODE_COOKED) in l4_open()
104 * l4_getcal() reads the L4 with calibration values.
140 * l4_setcal() programs the L4 with calibration values.
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| /Linux-v5.10/arch/sparc/include/asm/ |
| D | xor_32.h | 29 "ldd [%1 + 0x18], %%l4\n\t" in sparc_2()
36 "xor %%o2, %%l4, %%o2\n\t" in sparc_2()
46 "l0", "l1", "l2", "l3", "l4", "l5"); in sparc_2()
67 "ldd [%1 + 0x18], %%l4\n\t" in sparc_3()
77 "xor %%o2, %%l4, %%o2\n\t" in sparc_3()
79 "ldd [%2 + 0x18], %%l4\n\t" in sparc_3()
86 "xor %%o2, %%l4, %%o2\n\t" in sparc_3()
96 "l0", "l1", "l2", "l3", "l4", "l5"); in sparc_3()
118 "ldd [%1 + 0x18], %%l4\n\t" in sparc_4()
128 "xor %%o2, %%l4, %%o2\n\t" in sparc_4()
[all …]
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| /Linux-v5.10/arch/sparc/kernel/ |
| D | rtrap_64.S | 86 sethi %hi(0xf << 20), %l4
87 and %l1, %l4, %l4
88 andn %l1, %l4, %l1
90 srl %l4, 20, %l4
97 sethi %hi(0xf << 20), %l4
98 and %l1, %l4, %l4
99 andn %l1, %l4, %l1
100 srl %l4, 20, %l4
117 sethi %hi(0xf << 20), %l4
118 and %l1, %l4, %l4
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| D | entry.S | 68 * %l4 -- pdma_vaddr
87 ld [%l5 + %lo(pdma_vaddr)], %l4
104 stb %l7, [%l4]
106 add %l4, 0x1, %l4
113 ldub [%l4], %l7
117 add %l4, 0x1, %l4
122 st %l4, [%l5 + %lo(pdma_vaddr)]
154 st %l4, [%l5 + %lo(pdma_vaddr)]
167 st %l4, [%l5 + %lo(pdma_vaddr)]
180 or %l0, PSR_PIL, %l4
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| D | etrap_64.S | 26 * %g4 and %g5 will be preserved %l4 and %l5 respectively.
95 mov PRIMARY_CONTEXT, %l4
124 661: stxa %g3, [%l4] ASI_DMMU
127 stxa %g3, [%l4] ASI_MMU
130 sethi %hi(KERNBASE), %l4
131 flush %l4
133 2: mov %g4, %l4
198 add %l6, TI_FPSAVED + 1, %l4
205 stb %g0, [%l4 + %l3]
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| D | trampoline_64.S | 124 * %l4: TTE base
130 sethi %hi(kern_locked_tte_data), %l4
131 ldx [%l4 + %lo(kern_locked_tte_data)], %l4
163 add %l4, %g1, %g2
196 add %l4, %g1, %g2
222 sethi %hi(kern_locked_tte_data), %l4
223 ldx [%l4 + %lo(kern_locked_tte_data)], %l4
233 add %l4, %g2, %o2
241 add %l4, %g2, %o2
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| D | syscalls.S | 172 sll %g1, 2, %l4
174 lduw [%l7 + %l4], %l7
202 sll %g1, 2, %l4
204 lduw [%l7 + %l4], %l7
220 sll %g1, 2, %l4 ! IEU0 Group
222 lduw [%l7 + %l4], %l7 ! Load
244 sll %g1, 2, %l4 ! IEU0 Group
246 lduw [%l7 + %l4], %l7 ! Load
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| D | urtt_fill.S | 35 mov %g4, %l4
81 mov %l4, %o2
85 1: mov %l4, %o1
92 mov %l4, %o1
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| D | head_64.S | 183 ldx [%sp + 2047 + 128 + 0x20], %l4 ! prom root node
186 stw %l4, [%l1]
203 stx %l4, [%sp + 2047 + 128 + 0x18] ! arg1, prom_root_node
231 ldx [%sp + 2047 + 128 + 0x20], %l4 ! chosen device node
246 stx %l4, [%sp + 2047 + 128 + 0x18] ! arg1, chosen_node
281 mov (1b - prom_boot_mapping_mode), %l4
282 sub %l0, %l4, %l4
283 stw %l1, [%l4]
284 mov (1b - prom_boot_mapping_phys_high), %l4
285 sub %l0, %l4, %l4
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| D | winfixup.S | 60 stx %l4, [%g3 + TI_REG_WINDOW + 0x20]
77 stw %l4, [%g3 + TI_REG_WINDOW + 0x10]
124 mov %l4, %o2
128 1: mov %l4, %o1
147 mov %l4, %o1
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| D | sun4v_tlb_miss.S | 219 mov %l4, %o1
246 mov %l4, %o1
269 mov %l4, %o1
285 mov %l4, %o1
301 mov %l4, %o1
317 mov %l4, %o1
351 mov %l4, %o1
376 mov %l4, %o1
392 mov %l4, %o1
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| /Linux-v5.10/drivers/infiniband/hw/hfi1/ |
| D | trace_ibhdrs.h | 110 u8 l4, u32 dest_qpn, u32 src_qpn,
114 const char *hfi1_trace_get_packet_l4_str(u8 l4);
128 u8 *l4, u8 *rc, u8 *sc,
133 u8 age, bool becn, bool fecn, u8 l4,
138 const char *hfi1_trace_fmt_rest(struct trace_seq *p, bool bypass, u8 l4,
146 #define __parse_ib_ehdrs(op, l4, dest_qpn, src_qpn, ehdrs) \ argument
147 parse_everbs_hdrs(p, op, l4, dest_qpn, src_qpn, ehdrs)
168 __field(u8, l4)
204 &__entry->l4,
213 if (__entry->l4 == OPA_16B_L4_FM) {
[all …]
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| D | trace.c | 70 u8 l4 = hfi1_16B_get_l4(hdr); in __get_16b_hdr_len() local
72 if (l4 == OPA_16B_L4_FM) { in __get_16b_hdr_len()
77 if (l4 == OPA_16B_L4_IB_LOCAL) in __get_16b_hdr_len()
103 const char *hfi1_trace_get_packet_l4_str(u8 l4) in hfi1_trace_get_packet_l4_str() argument
105 if (l4) in hfi1_trace_get_packet_l4_str()
207 u8 *l4, u8 *rc, u8 *sc, in hfi1_trace_parse_16b_hdr() argument
214 *l4 = hfi1_16B_get_l4(hdr); in hfi1_trace_parse_16b_hdr()
226 #define LRH_16B_PRN "age:%d becn:%d fecn:%d l4:%d " \
229 u8 age, bool becn, bool fecn, u8 l4, in hfi1_trace_fmt_lrh() argument
240 age, becn, fecn, l4, rc, sc, pkey, entropy); in hfi1_trace_fmt_lrh()
[all …]
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| /Linux-v5.10/Documentation/devicetree/bindings/regulator/ |
| D | qcom,smd-rpm-regulator.yaml | 29 For pm8916, s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,
32 For pm8941, s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,
36 For pm8950 and pm8953, s1, s2, s3, s4, s5, s6, s7, l1, l2, l3, l4, l5, l6,
41 l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19,
45 l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19,
51 For pm660l s1, s2, s3, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, bob
54 l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19,
61 For pms405, s1, s2, s3, s4, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,
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| /Linux-v5.10/drivers/net/ethernet/amazon/ena/ |
| D | ena_eth_io_defs.h | 54 * 12:8 : l4_proto_idx - L4 protocol. This field need
62 * 17 : l4_csum_partial - L4 partial checksum. when
63 * set to 0, the ENA calculates the L4 checksum,
68 * the checksum field of the L4 is used instead. When
70 * must not include the tcp length field. L4 partial
89 * set to the sum of L4 header offset and L4 header
136 * 21:16 : l4_hdr_len_in_words - counts the L4 header
138 * that L4 header appears right after L3 header and
139 * L4 offset is based on l3_hdr_off+l3_hdr_len
207 * 14 : l4_csum_err - when set, either the L4
[all …]
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| /Linux-v5.10/Documentation/devicetree/bindings/clock/ |
| D | ti-clkctrl.txt | 20 "ti,clkctrl-l4-cfg"
21 "ti,clkctrl-l4-per"
22 "ti,clkctrl-l4-secure"
23 "ti,clkctrl-l4-wkup"
35 compatible = "ti,clkctrl-l4-per", "ti,clkctrl";
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| /Linux-v5.10/drivers/net/ethernet/huawei/hinic/ |
| D | hinic_tx.c | 201 union hinic_l4 *l4, in get_inner_l3_l4_type() argument
217 if (exthdr != l4->hdr) { in get_inner_l3_l4_type()
229 static void get_inner_l4_info(struct sk_buff *skb, union hinic_l4 *l4, in get_inner_l4_info() argument
242 *l4_len = l4->tcp->doff * 4; in get_inner_l4_info()
243 *offset = *l4_len + TRANSPORT_OFFSET(l4->hdr, skb); in get_inner_l4_info()
249 *offset = TRANSPORT_OFFSET(l4->hdr, skb); in get_inner_l4_info()
259 *offset = TRANSPORT_OFFSET(l4->hdr, skb); in get_inner_l4_info()
281 union hinic_l4 l4; in offload_tso() local
296 l4.hdr = skb_transport_header(skb); in offload_tso()
312 l4.udp->check = ~csum_magic(&ip, IPPROTO_UDP); in offload_tso()
[all …]
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| /Linux-v5.10/arch/arm/mach-omap2/ |
| D | omap_hwmod_2xxx_interconnect_data.c | 58 /* L4 CORE -> UART1 interface */
66 /* L4 CORE -> UART2 interface */
74 /* L4 PER -> UART3 interface */
82 /* l4 core -> mcspi1 interface */
90 /* l4 core -> mcspi2 interface */
243 /* l4 core -> sham interface */
251 /* l4 core -> aes interface */
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| D | omap_hwmod_33xx_data.c | 212 /* l3 main -> l4 hs */
220 /* wkup m3 -> l4 wkup */
228 /* l4 wkup -> wkup m3 */
244 /* l4 wkup -> smartreflex0 */
252 /* l4 wkup -> smartreflex1 */
260 /* l4 wkup -> control */
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| /Linux-v5.10/tools/perf/pmu-events/arch/powerpc/power8/ |
| D | metrics.json | 279 … "BriefDescription": "Cycles stalled by D-Cache Misses that resolved in local memory or local L4",
468 "BriefDescription": "% of DL1 Reloads from Distant L4 per Inst",
558 "BriefDescription": "% of DL1 Reloads from Local L4 per Inst",
618 "BriefDescription": "% of DL1 dL1_Reloads from Distant L4",
702 "BriefDescription": "% of DL1 dL1_Reloads from Local L4",
726 "BriefDescription": "% of DL1 dL1_Reloads from Remote L4",
756 …"BriefDescription": "estimate of distant L4 miss rates with measured DL4 latency as a %of dcache m…
804 …"BriefDescription": "estimate of Local L4 miss rates with measured LL4 latency as a %of dcache mis…
828 …"BriefDescription": "estimate of remote L4 miss rates with measured RL4 latency as a %of dcache mi…
1062 "BriefDescription": "% of ICache reloads from Distant L4 per Inst",
[all …]
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| D | frontend.json | 101 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a di…
102 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a d…
185 …"BriefDescription": "The processor's Instruction cache was reloaded from the local chip's L4 cache…
186 …"PublicDescription": "The processor's Instruction cache was reloaded from the local chip's L4 cach…
197 …rocessor's Instruction cache was reloaded from a memory location including L4 from local remote or…
198 …rocessor's Instruction cache was reloaded from a memory location including L4 from local remote or…
227 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on the …
228 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on the…
305 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on a differ…
371 …"BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due…
[all …]
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| D | marked.json | 59 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on a different…
65 …"BriefDescription": "Duration in cycles to reload from another chip's L4 on a different Node or Gr…
215 …"BriefDescription": "The processor's data cache was reloaded from the local chip's L4 cache due to…
221 …"BriefDescription": "Duration in cycles to reload from the local chip's L4 cache due to a marked l…
239 … "The processor's data cache was reloaded from a memory location including L4 from local remote or…
245 …"BriefDescription": "Duration in cycles to reload from a memory location including L4 from local r…
299 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on the same No…
305 …"BriefDescription": "Duration in cycles to reload from another chip's L4 on the same Node or Group…
377 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on a differ…
443 …"BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due…
[all …]
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| /Linux-v5.10/tools/perf/pmu-events/arch/powerpc/power9/ |
| D | metrics.json | 817 …"BriefDescription": "estimate of distant L4 miss rates with measured DL4 latency as a %of dcache m…
883 …"BriefDescription": "estimate of remote L4 miss rates with measured RL4 latency as a %of dcache mi…
1015 "BriefDescription": "% of ICache reloads from Distant L4 per Inst",
1063 "BriefDescription": "% of ICache reloads from Local L4 per Inst",
1087 "BriefDescription": "% of ICache reloads from Remote L4 per Inst",
1129 "BriefDescription": "% of ICache reloads from Distant L4",
1177 "BriefDescription": "% of ICache reloads from Local L4",
1201 "BriefDescription": "% of ICache reloads from Remote L4",
1381 "BriefDescription": "Distant L4 average load latency",
1435 "BriefDescription": "Local L4 average load latency",
[all …]
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| /Linux-v5.10/drivers/bus/ |
| D | omap_l3_smx.h | 269 /* L4 CORE TA */
271 /* L4 PER TA */
277 /* L4 EMU TA */
281 /* L4 CORE TA */
283 /* L4 PER TA */
285 /* L4 EMU TA */
|
