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/Linux-v5.15/Documentation/devicetree/bindings/memory-controllers/
Dbaikal,bt1-l2-ctl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/memory-controllers/baikal,bt1-l2-ctl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Baikal-T1 L2-cache Control Block
11 - Serge Semin <fancer.lancer@gmail.com>
14 By means of the System Controller Baikal-T1 SoC exposes a few settings to
15 tune the MIPS P5600 CM2 L2 cache performance up. In particular it's possible
16 to change the Tag, Data and Way-select RAM access latencies. Baikal-T1
17 L2-cache controller block is responsible for the tuning. Its DT node is
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/Linux-v5.15/drivers/memory/
Dbt1-l2-ctl.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Baikal-T1 CM2 L2-cache Control Block driver.
38 * struct l2_ctl - Baikal-T1 L2 Control block private data.
40 * @sys_regs: Baikal-T1 System Controller registers map.
49 * enum l2_ctl_stall - Baikal-T1 L2-cache-RAM stall identifier.
50 * @L2_WSSTALL: Way-select latency.
51 * @L2_TAGSTALL: Tag latency.
52 * @L2_DATASTALL: Data latency.
61 * struct l2_ctl_device_attribute - Baikal-T1 L2-cache device attribute.
63 * @id: L2-cache stall field identifier.
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/Linux-v5.15/drivers/block/drbd/
Ddrbd_receiver.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 Copyright (C) 2001-2008, LINBIT Information Technologies GmbH.
8 Copyright (C) 1999-2008, Philipp Reisner <philipp.reisner@linbit.com>.
9 Copyright (C) 2002-2008, Lars Ellenberg <lars.ellenberg@linbit.com>.
69 * page->private being our "next" pointer.
91 if (--n == 0) in page_chain_del()
161 drbd_pp_vacant -= number; in __drbd_alloc_pages()
167 /* GFP_TRY, because we must not cause arbitrary write-out: in a DRBD in __drbd_alloc_pages()
168 * "criss-cross" setup, that might cause write-out on some other DRBD, in __drbd_alloc_pages()
204 list_for_each_entry_safe(peer_req, tmp, &device->net_ee, w.list) { in reclaim_finished_net_peer_reqs()
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