Searched full:kilo (Results 1 – 25 of 39) sorted by relevance
12
84 if (bt->bitrate > 800 * KILO /* BPS */) in can_calc_bittiming()86 else if (bt->bitrate > 500 * KILO /* BPS */) in can_calc_bittiming()
83 beacon_period integer beacon period in Kilo-microseconds,104 hop_dwell integer hop dwell time in Kilo-microseconds
30 values R1 and R2 of the feedback voltage divider in kilo ohms.
12 #define KILO 1000UL macro
1004 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",1010 …"BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including spe…1016 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",1022 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all request types (inc…1028 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all demand loads (inc…1034 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…1040 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…1046 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",1052 …"BriefDescription": "Fill Buffer (FB) hits per kilo instructions for retired demand loads (L1D mis…1089 …"BriefDescription": "Rate of silent evictions from the L2 cache per Kilo instruction where the evi…[all …]
988 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",994 …"BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including spe…1000 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",1006 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all request types (inc…1012 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all demand loads (inc…1018 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…1024 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…1030 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",1036 …"BriefDescription": "Fill Buffer (FB) hits per kilo instructions for retired demand loads (L1D mis…1073 …"BriefDescription": "Rate of silent evictions from the L2 cache per Kilo instruction where the evi…[all …]
949 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",955 …"BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including spe…961 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",967 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all request types (inc…973 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all demand loads (inc…979 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…985 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…991 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",997 …"BriefDescription": "Fill Buffer (FB) hits per kilo instructions for retired demand loads (L1D mis…
977 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",983 …"BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including spe…989 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",995 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all request types (inc…1001 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all demand loads (inc…1007 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…1013 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…1019 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",1025 …"BriefDescription": "Fill Buffer (FB) hits per kilo instructions for retired demand loads (L1D mis…
995 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",1001 …"BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including spe…1007 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",1013 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all request types (inc…1019 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all demand loads (inc…1025 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…1031 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",1037 …"BriefDescription": "Fill Buffer (FB) hits per kilo instructions for retired demand loads (L1D mis…1074 …"BriefDescription": "Rate of silent evictions from the L2 cache per Kilo instruction where the evi…1080 "BriefDescription": "Rate of non silent evictions from the L2 cache per Kilo instruction",
747 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",753 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",759 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all request types (inc…765 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all demand loads (inc…771 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…777 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…783 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",
751 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",757 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",763 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all request types (inc…769 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all demand loads (inc…775 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…781 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…787 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",
1097 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",1103 …"BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including spe…1109 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",1115 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all request types (inc…1121 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all demand loads (inc…1127 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…1133 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…1139 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",1145 …"BriefDescription": "Fill Buffer (FB) hits per kilo instructions for retired demand loads (L1D mis…1182 …"BriefDescription": "Rate of silent evictions from the L2 cache per Kilo instruction where the evi…[all …]
977 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",983 …"BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including spe…989 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",995 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all request types (inc…1001 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all demand loads (inc…1007 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…1013 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",1019 …"BriefDescription": "Fill Buffer (FB) hits per kilo instructions for retired demand loads (L1D mis…
158 # Set trace buffer size to N kilo-bytes (default: all of free memory up to 3GB)
771 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",777 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",783 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all request types (inc…789 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all demand loads (inc…795 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…801 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…807 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",
1162 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",1169 …"BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including spe…1176 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",1183 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all request types (inc…1190 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all demand loads (inc…1197 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…1204 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…1211 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",1218 …"BriefDescription": "Fill Buffer (FB) hits per kilo instructions for retired demand loads (L1D mis…
220 * %SKL_TKN_U32_ASTATE_KCPS: Specifies the core load threshold (in kilo
215 multipliers 'Kilo', 'Mega', and 'Giga', equaling 2^10, 2^20, and 2^30
77 These parameters accept a suffix k, m or g for kilo, mega and giga and
192 Set trace buffer size to N kilo-bytes (default: all of free memory up to 3GB)
196 st->lo_freq_hz = (u64)tmp * KILO; in admv4420_fw_parse()
2946 * @bw: bandwidth in Kbps - Kilo bits per sec2965 * @bw: bandwidth in Kbps - Kilo bits per sec2990 * @bw: bandwidth in Kbps - Kilo bits per sec3018 * @bw: bandwidth in Kbps - Kilo bits per sec3161 * @bw: bandwidth in Kbps - Kilo bits per sec3556 * @bw: bandwidth in Kbps - Kilo bits per sec3604 * @bw: bandwidth in Kbps - Kilo bits per sec3698 * @bw: bandwidth in Kbps - Kilo bits per sec
12 * by "ki", "Mi" or "Gi", the numbers will be interpreted as kilo, mega or
612 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",618 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",624 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",
648 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",654 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",660 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",
