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/Linux-v6.1/Documentation/devicetree/bindings/memory-controllers/
Dingenic,nemc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ingenic,nemc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs NAND / External Memory Controller (NEMC) devicetree bindings
10 - Paul Cercueil <paul@crapouillou.net>
14 pattern: "^memory-controller@[0-9a-f]+$"
18 - enum:
19 - ingenic,jz4740-nemc
20 - ingenic,jz4780-nemc
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/Linux-v6.1/Documentation/devicetree/bindings/mtd/
Dingenic,nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: nand-controller.yaml#
14 - $ref: /schemas/memory-controllers/ingenic,nemc-peripherals.yaml#
19 - ingenic,jz4740-nand
20 - ingenic,jz4725b-nand
21 - ingenic,jz4780-nand
25 - description: Bank number, offset and size of first attached NAND chip
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/Linux-v6.1/drivers/memory/
Djz4780-nemc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * JZ4780 NAND/external memory controller (NEMC)
6 * Author: Alex Smith <alex@alex-smith.me.uk>
21 #include <linux/jz4780-nemc.h>
23 #define NEMC_SMCRn(n) (0x14 + (((n) - 1) * 4))
43 #define NEMC_NFCSR_NFEn(n) BIT(((n) - 1) << 1)
44 #define NEMC_NFCSR_NFCEn(n) BIT((((n) - 1) << 1) + 1)
45 #define NEMC_NFCSR_TNFEn(n) BIT(16 + (n) - 1)
62 * jz4780_nemc_num_banks() - count the number of banks referenced by a device
63 * @dev: device to count banks for, must be a child of the NEMC.
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
34 bool "Atmel (Multi-port DDR-)SDRAM Controller"
39 This driver is for Atmel SDRAM Controller or Atmel Multi-port
40 DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
42 LP-DDR memories.
53 Used to configure the EBI (external bus interface) when the device-
79 bool "Baikal-T1 CM2 L2-RAM Cache Control Block"
83 Baikal-T1 CPU is based on the MIPS P5600 Warrior IP-core. The CPU
84 resides Coherency Manager v2 with embedded 1MB L2-cache. It's
86 tags and way-select latencies of RAM access. This driver provides a
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 obj-$(CONFIG_DDR) += jedec_ddr_data.o
8 obj-$(CONFIG_OF) += of_memory.o
10 obj-$(CONFIG_ARM_PL172_MPMC) += pl172.o
11 obj-$(CONFIG_ATMEL_SDRAMC) += atmel-sdramc.o
12 obj-$(CONFIG_ATMEL_EBI) += atmel-ebi.o
13 obj-$(CONFIG_BRCMSTB_DPFE) += brcmstb_dpfe.o
14 obj-$(CONFIG_BRCMSTB_MEMC) += brcmstb_memc.o
15 obj-$(CONFIG_BT1_L2_CTL) += bt1-l2-ctl.o
16 obj-$(CONFIG_TI_AEMIF) += ti-aemif.o
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/Linux-v6.1/arch/mips/boot/dts/ingenic/
Dci20.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "jz4780.dtsi"
5 #include <dt-bindings/clock/ingenic,tcu.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/regulator/active-semi,8865-regulator.h>
12 compatible = "img,ci20", "ingenic,jz4780";
22 stdout-path = &uart4;
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Djz4780.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
4 #include <dt-bindings/dma/jz4780-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
9 compatible = "ingenic,jz4780";
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
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/Linux-v6.1/drivers/mtd/nand/raw/ingenic/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "JZ4780 NAND controller"
7 Enables support for NAND Flash connected to the NEMC on JZ4780 SoC
19 Enable this driver to support the Reed-Solomon error-correction
23 will be called jz4740-ecc.
29 Enable this driver to support the BCH error-correction hardware
33 will be called jz4725b-bch.
36 tristate "Hardware BCH support for JZ4780 SoC"
39 Enable this driver to support the BCH error-correction hardware
40 present on the JZ4780 SoC from Ingenic.
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Dingenic_nand_drv.c1 // SPDX-License-Identifier: GPL-2.0
24 #include <linux/jz4780-nemc.h>
28 #define DRV_NAME "ingenic-nand"
76 struct nand_ecc_ctrl *ecc = &chip->ecc; in qi_lb60_ooblayout_ecc()
78 if (section || !ecc->total) in qi_lb60_ooblayout_ecc()
79 return -ERANGE; in qi_lb60_ooblayout_ecc()
81 oobregion->length = ecc->total; in qi_lb60_ooblayout_ecc()
82 oobregion->offset = 12; in qi_lb60_ooblayout_ecc()
91 struct nand_ecc_ctrl *ecc = &chip->ecc; in qi_lb60_ooblayout_free()
94 return -ERANGE; in qi_lb60_ooblayout_free()
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/Linux-v6.1/include/linux/
Djz4780-nemc.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * JZ4780 NAND/external memory controller (NEMC)
6 * Author: Alex Smith <alex@alex-smith.me.uk>
17 * Number of NEMC banks. Note that there are actually 6, but they are numbered
23 * enum jz4780_nemc_bank_type - device types which can be connected to a bank
/Linux-v6.1/drivers/pinctrl/
Dpinctrl-ingenic.c1 // SPDX-License-Identifier: GPL-2.0-only
20 #include <linux/pinctrl/pinconf-generic.h>
162 (!(enabled_socs & GENMASK(version - 1, 0)) in is_soc_or_above()
163 || jzpc->info->version >= version); in is_soc_or_above()
201 INGENIC_PIN_GROUP("mmc-1bit", jz4730_mmc_1bit, 1),
202 INGENIC_PIN_GROUP("mmc-4bit", jz4730_mmc_4bit, 1),
203 INGENIC_PIN_GROUP("uart0-data", jz4730_uart0_data, 1),
204 INGENIC_PIN_GROUP("uart1-data", jz4730_uart1_data, 1),
205 INGENIC_PIN_GROUP("uart2-data", jz4730_uart2_data, 1),
206 INGENIC_PIN_GROUP("uart3-data", jz4730_uart3_data, 1),
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/Linux-v6.1/drivers/clk/ingenic/
Djz4780-cgu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Ingenic JZ4780 SoC CGU driver
5 * Copyright (c) 2013-2015 Imagination Technologies
10 #include <linux/clk-provider.h>
16 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
111 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_recalc_rate()
170 return -EINVAL; in jz4780_otg_phy_set_rate()
173 spin_lock_irqsave(&cgu->lock, flags); in jz4780_otg_phy_set_rate()
175 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_set_rate()
178 writel(usbpcr1, cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_set_rate()
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/Linux-v6.1/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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