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/Linux-v5.10/Documentation/devicetree/bindings/interrupt-controller/
Dintel,ixp4xx-interrupt.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/interrupt-controller/intel,ixp4xx-interrupt.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Intel IXP4xx XScale Networking Processors Interrupt Controller
11 - Linus Walleij <linus.walleij@linaro.org>
14 This interrupt controller is found in the Intel IXP4xx processors.
19 The distinct IXP4xx families with different interrupt controller
20 variations are IXP42x, IXP43x, IXP45x and IXP46x. Those four
27 - enum:
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/Linux-v5.10/drivers/irqchip/
Dirq-ixp4xx.c1 // SPDX-License-Identifier: GPL-2.0
3 * irqchip for the IXP4xx interrupt controller
6 * Based on arch/arm/mach-ixp4xx/common.c
8 * Copyright 2003-2004 (C) MontaVista, Software, Inc.
16 #include <linux/irqchip/irq-ixp4xx.h>
27 #define IXP4XX_ICPR 0x00 /* Interrupt Status */
28 #define IXP4XX_ICMR 0x04 /* Interrupt Enable */
29 #define IXP4XX_ICLR 0x08 /* Interrupt IRQ/FIQ Select */
32 #define IXP4XX_ICHR 0x14 /* Interrupt Priority */
36 /* IXP43x and IXP46x-only */
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/Linux-v5.10/arch/arm/boot/dts/
Dintel-ixp43x.dtsi1 // SPDX-License-Identifier: ISC
7 #include "intel-ixp4xx.dtsi"
11 interrupt-controller@c8003000 {
12 compatible = "intel,ixp43x-interrupt";
Dintel-ixp45x-ixp46x.dtsi1 // SPDX-License-Identifier: ISC
8 #include "intel-ixp4xx.dtsi"
12 interrupt-controller@c8003000 {
13 compatible = "intel,ixp43x-interrupt";
21 compatible = "intel,ixp4xx-udc";
28 compatible = "intel,ixp4xx-i2c";
/Linux-v5.10/arch/arm/mach-ixp4xx/include/mach/
Dixp4xx-regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
8 * and machine-name.h.
11 * Copyright (C) 2003-2004 MontaVista Software, Inc.
29 * 0xC8000000 0x00013000 0xFEF00000 On-Chip Peripherals
44 * Peripheral space, including debug UART. Must be section-aligned so that
45 * it can be used with the low-level debug code.
259 /* ISR (Interrupt status) Register bit definitions */
269 /* INTEN (Interrupt Enable) Register bit definitions */
300 #define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */
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/Linux-v5.10/drivers/soc/ixp4xx/
Dixp4xx-npe.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * - Intel IXP4xx Developer's Manual and other e-papers
9 * - Intel IXP400 Access Library Software (BSD license)
10 * - previous works by Christian Hohnstaedt <chohnstaedt@innominate.com>
15 #include <linux/dma-mapping.h>
104 #define MSGSTAT_MBINT 0x00100000 /* Mailbox interrupt */
105 #define MSGSTAT_IFINT 0x00200000 /* InFifo interrupt */
106 #define MSGSTAT_OFINT 0x00400000 /* OutFifo interrupt */
107 #define MSGSTAT_WFINT 0x00800000 /* WatchFifo interrupt */
118 #define NPE_A_FIRMWARE "NPE-A"
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/Linux-v5.10/drivers/net/ethernet/xscale/
Dixp4xx_eth.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * NPE 0 (NPE-A) 1 (NPE-B) 2 (NPE-C)
13 * RX-free queue 26 27 28
14 * TX-done queue is always 31, per-port RX and TX-ready queues are configurable
17 * bits 0 -> 1 - NPE ID (RX and TX-done)
18 * bits 0 -> 2 - priority (TX, per 802.1D)
19 * bits 3 -> 4 - port ID (user-set?)
20 * bits 5 -> 31 - physical descriptor address
24 #include <linux/dma-mapping.h>
65 #define MAX_CLOSE_WAIT 1000 /* microseconds, typically 2-3 cycles */
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