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/Linux-v6.1/drivers/mailbox/
Dstm32-ipcc.c53 spinlock_t lock; /* protect access to IPCC registers */
83 struct stm32_ipcc *ipcc = data; in stm32_ipcc_rx_irq() local
84 struct device *dev = ipcc->controller.dev; in stm32_ipcc_rx_irq()
90 proc_offset = ipcc->proc_id ? -IPCC_PROC_OFFST : IPCC_PROC_OFFST; in stm32_ipcc_rx_irq()
91 tosr = readl_relaxed(ipcc->reg_proc + proc_offset + IPCC_XTOYSR); in stm32_ipcc_rx_irq()
92 mr = readl_relaxed(ipcc->reg_proc + IPCC_XMR); in stm32_ipcc_rx_irq()
97 for (chan = 0; chan < ipcc->n_chans; chan++) { in stm32_ipcc_rx_irq()
103 mbox_chan_received_data(&ipcc->controller.chans[chan], NULL); in stm32_ipcc_rx_irq()
105 stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XSCR, in stm32_ipcc_rx_irq()
116 struct stm32_ipcc *ipcc = data; in stm32_ipcc_tx_irq() local
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Dqcom-ipcc.c14 #include <dt-bindings/mailbox/qcom-ipcc.h>
16 /* IPCC Register offsets */
42 * @base: Base address of the IPCC frame associated to APSS
74 struct qcom_ipcc *ipcc = data; in qcom_ipcc_irq_fn() local
79 hwirq = readl(ipcc->base + IPCC_REG_RECV_ID); in qcom_ipcc_irq_fn()
83 virq = irq_find_mapping(ipcc->irq_domain, hwirq); in qcom_ipcc_irq_fn()
84 writel(hwirq, ipcc->base + IPCC_REG_RECV_SIGNAL_CLEAR); in qcom_ipcc_irq_fn()
93 struct qcom_ipcc *ipcc = irq_data_get_irq_chip_data(irqd); in qcom_ipcc_mask_irq() local
96 writel(hwirq, ipcc->base + IPCC_REG_RECV_SIGNAL_DISABLE); in qcom_ipcc_mask_irq()
101 struct qcom_ipcc *ipcc = irq_data_get_irq_chip_data(irqd); in qcom_ipcc_unmask_irq() local
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DKconfig234 tristate "STM32 IPCC Mailbox"
238 with hardware for Inter-Processor Communication Controller (IPCC)
288 tristate "Qualcomm Technologies, Inc. IPCC driver"
292 (IPCC) driver for MSM devices. The driver provides mailbox support for
DMakefile50 obj-$(CONFIG_STM32_IPCC) += stm32-ipcc.o
62 obj-$(CONFIG_QCOM_IPCC) += qcom-ipcc.o
/Linux-v6.1/Documentation/devicetree/bindings/mailbox/
Dqcom-ipcc.yaml4 $id: http://devicetree.org/schemas/mailbox/qcom-ipcc.yaml#
13 The Inter-Processor Communication Controller (IPCC) is a centralized hardware
20 protocol (protocol-id is 0). Refer include/dt-bindings/mailbox/qcom-ipcc.h
27 - qcom,sm6350-ipcc
28 - qcom,sm6375-ipcc
29 - qcom,sm8250-ipcc
30 - qcom,sm8350-ipcc
31 - qcom,sm8450-ipcc
32 - qcom,sc7280-ipcc
33 - const: qcom,ipcc
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Dst,stm32-ipcc.yaml4 $id: "http://devicetree.org/schemas/mailbox/st,stm32-ipcc.yaml#"
10 The IPCC block provides a non blocking signaling mechanism to post and
21 const: st,stm32mp1-ipcc
64 ipcc: mailbox@4c001000 {
65 compatible = "st,stm32mp1-ipcc";
72 clocks = <&rcc_clk IPCC>;
/Linux-v6.1/sound/soc/intel/catpt/
Dipc.c64 catpt_writel_shim(cdev, IPCC, header); in catpt_dsp_send_tx()
268 u32 isc, ipcc; in catpt_dsp_irq_handler() local
278 ipcc = catpt_readl_shim(cdev, IPCC); in catpt_dsp_irq_handler()
279 trace_catpt_ipc_reply(ipcc); in catpt_dsp_irq_handler()
280 catpt_dsp_copy_rx(cdev, ipcc); in catpt_dsp_irq_handler()
284 catpt_updatel_shim(cdev, IPCC, CATPT_IPCC_DONE, 0); in catpt_dsp_irq_handler()
/Linux-v6.1/arch/arm/boot/dts/
Dstm32mp157a-microgea-stm32mp1.dtsi116 &ipcc {
128 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
Dstm32mp157a-icore-stm32mp1.dtsi164 &ipcc {
176 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
Dstm32mp15xx-osd32.dtsi206 &ipcc {
213 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
Dstm32mp157c-odyssey-som.dtsi231 &ipcc {
243 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
Dstm32mp15xx-dhcor-som.dtsi224 &ipcc {
236 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
Dstm32mp157c-ed1.dts304 &ipcc {
316 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
Dstm32mp157c-emstamp-argon.dtsi366 &ipcc {
378 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
Dstm32mp15xx-dhcom-som.dtsi405 &ipcc {
417 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
Dstm32mp15xx-dkx.dtsi447 &ipcc {
473 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
/Linux-v6.1/Documentation/devicetree/bindings/remoteproc/
Dqcom,glink-edge.yaml60 #include <dt-bindings/mailbox/qcom-ipcc.h>
67 interrupts-extended = <&ipcc IPCC_CLIENT_WPSS
70 mboxes = <&ipcc IPCC_CLIENT_WPSS
Dqcom,sc7280-wpss-pil.yaml159 #include <dt-bindings/mailbox/qcom-ipcc.h>
198 interrupts-extended = <&ipcc IPCC_CLIENT_WPSS
201 mboxes = <&ipcc IPCC_CLIENT_WPSS
Dqcom,sc7280-mss-pil.yaml208 #include <dt-bindings/mailbox/qcom-ipcc.h>
259 interrupts-extended = <&ipcc IPCC_CLIENT_MPSS
262 mboxes = <&ipcc IPCC_CLIENT_MPSS
Dqcom,smd-edge.yaml106 #include <dt-bindings/mailbox/qcom-ipcc.h>
/Linux-v6.1/Documentation/devicetree/bindings/misc/
Dqcom,fastrpc.yaml107 #include <dt-bindings/mailbox/qcom-ipcc.h>
110 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
113 mboxes = <&ipcc IPCC_CLIENT_LPASS
/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dsm6350.dtsi13 #include <dt-bindings/mailbox/qcom-ipcc.h>
370 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
373 mboxes = <&ipcc IPCC_CLIENT_LPASS
394 interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
397 mboxes = <&ipcc IPCC_CLIENT_CDSP
419 interrupts-extended = <&ipcc IPCC_CLIENT_MPSS
422 mboxes = <&ipcc IPCC_CLIENT_MPSS
462 ipcc: mailbox@408000 { label
463 compatible = "qcom,sm6350-ipcc", "qcom,ipcc";
883 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
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Dsc8280xp.dtsi11 #include <dt-bindings/mailbox/qcom-ipcc.h>
624 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
627 mboxes = <&ipcc IPCC_CLIENT_LPASS
648 interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
651 mboxes = <&ipcc IPCC_CLIENT_CDSP
672 interrupts-extended = <&ipcc IPCC_CLIENT_NSP1
675 mboxes = <&ipcc IPCC_CLIENT_NSP1
742 ipcc: mailbox@408000 { label
743 compatible = "qcom,sc8280xp-ipcc", "qcom,ipcc";
1147 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
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Dsm8350.dtsi13 #include <dt-bindings/mailbox/qcom-ipcc.h>
528 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
531 mboxes = <&ipcc IPCC_CLIENT_LPASS
552 interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
555 mboxes = <&ipcc IPCC_CLIENT_CDSP
576 interrupts-extended = <&ipcc IPCC_CLIENT_MPSS
579 mboxes = <&ipcc IPCC_CLIENT_MPSS
611 interrupts-extended = <&ipcc IPCC_CLIENT_SLPI
614 mboxes = <&ipcc IPCC_CLIENT_SLPI
671 ipcc: mailbox@408000 { label
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Dsm8450.dtsi12 #include <dt-bindings/mailbox/qcom-ipcc.h>
605 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
608 mboxes = <&ipcc IPCC_CLIENT_LPASS
629 interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
632 mboxes = <&ipcc IPCC_CLIENT_CDSP
653 interrupts-extended = <&ipcc IPCC_CLIENT_MPSS
656 mboxes = <&ipcc IPCC_CLIENT_MPSS
688 interrupts-extended = <&ipcc IPCC_CLIENT_SLPI
691 mboxes = <&ipcc IPCC_CLIENT_SLPI
2060 interrupts-extended = <&ipcc IPCC_CLIENT_SLPI
[all …]

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