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/Linux-v6.1/arch/arm/mach-imx/
Dmach-imx6q.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011-2013 Freescale Semiconductor, Inc.
15 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
44 * fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High
45 * as they are used for slots1-7 PERST#
54 if (dev->devfn != 0) in ventana_pciesw_early_fixup()
58 dw |= 0xaaa8; // GPIO1-7 outputs in ventana_pciesw_early_fixup()
62 dw |= 0xfe; // GPIO1-7 output high in ventana_pciesw_early_fixup()
84 struct regmap *gpr; in imx6q_1588_init() local
87 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-fec"); in imx6q_1588_init()
[all …]
Dmach-imx6sx.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
20 struct regmap *gpr; in imx6sx_enet_clk_sel() local
22 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sx-iomuxc-gpr"); in imx6sx_enet_clk_sel()
23 if (!IS_ERR(gpr)) { in imx6sx_enet_clk_sel()
24 regmap_update_bits(gpr, IOMUXC_GPR1, in imx6sx_enet_clk_sel()
26 regmap_update_bits(gpr, IOMUXC_GPR1, in imx6sx_enet_clk_sel()
29 pr_err("failed to find fsl,imx6sx-iomux-gpr regmap\n"); in imx6sx_enet_clk_sel()
54 imx6_pm_ccm_init("fsl,imx6sx-ccm"); in imx6sx_init_irq()
62 platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0); in imx6sx_init_late()
Dmach-imx6sl.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
20 struct regmap *gpr; in imx6sl_fec_init() local
23 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sl-iomuxc-gpr"); in imx6sl_fec_init()
24 if (!IS_ERR(gpr)) { in imx6sl_fec_init()
25 regmap_update_bits(gpr, IOMUXC_GPR1, in imx6sl_fec_init()
27 regmap_update_bits(gpr, IOMUXC_GPR1, in imx6sl_fec_init()
30 pr_err("failed to find fsl,imx6sl-iomux-gpr regmap\n"); in imx6sl_fec_init()
38 platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0); in imx6sl_init_late()
64 imx6_pm_ccm_init("fsl,imx6sl-ccm"); in imx6sl_init_irq()
[all …]
Dmach-imx6ul.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
21 struct regmap *gpr; in imx6ul_enet_clk_init() local
23 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr"); in imx6ul_enet_clk_init()
24 if (!IS_ERR(gpr)) in imx6ul_enet_clk_init()
25 regmap_update_bits(gpr, IOMUXC_GPR1, IMX6UL_GPR1_ENET_CLK_DIR, in imx6ul_enet_clk_init()
28 pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n"); in imx6ul_enet_clk_init()
52 imx6_pm_ccm_init("fsl,imx6ul-ccm"); in imx6ul_init_irq()
60 platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0); in imx6ul_init_late()
Dmach-imx7d.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
40 struct regmap *gpr; in imx7d_enet_clk_sel() local
42 gpr = syscon_regmap_lookup_by_compatible("fsl,imx7d-iomuxc-gpr"); in imx7d_enet_clk_sel()
43 if (!IS_ERR(gpr)) { in imx7d_enet_clk_sel()
44 regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_TX_CLK_SEL_MASK, 0); in imx7d_enet_clk_sel()
45 regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_CLK_DIR_MASK, 0); in imx7d_enet_clk_sel()
47 pr_err("failed to find fsl,imx7d-iomux-gpr regmap\n"); in imx7d_enet_clk_sel()
66 platform_device_register_simple("imx-cpufreq-dt", -1, NULL, 0); in imx7d_init_late()
Dpm-imx6.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011-2014 Freescale Semiconductor, Inc.
13 #include <linux/irqchip/arm-gic.h>
15 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
23 #include <asm/proc-fns.h>
146 0x27c, 0x498, 0x4a4, 0x490, /* SDCLK0, GPR_B0DS-B1DS, GPR_ADDS */
152 .mmdc_compat = "fsl,imx6q-mmdc",
153 .src_compat = "fsl,imx6q-src",
154 .iomuxc_compat = "fsl,imx6q-iomuxc",
155 .gpc_compat = "fsl,imx6q-gpc",
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/Linux-v6.1/Documentation/devicetree/bindings/display/imx/
Dldb.txt1 Device-Tree bindings for LVDS Display Bridge (ldb)
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
19 - clocks, clock-names : phandles to the LDB divider and selector clocks and to
21 Documentation/devicetree/bindings/clock/clock-bindings.txt
23 "di0_pll" - LDB LVDS channel 0 mux
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Dfsl,imx6-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx6-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Philipp Zabel <p.zabel@pengutronix.de>
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
22 - fsl,imx6dl-hdmi
23 - fsl,imx6q-hdmi
25 reg-io-width:
31 clock-names:
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/Linux-v6.1/drivers/pci/controller/dwc/
Dpci-imx6.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
36 #include "pcie-designware.h"
45 #define to_imx6_pcie(x) dev_get_drvdata((x)->dev)
65 const char *gpr; member
104 /* PCIe Port Logic registers (memory-mapped) */
117 /* PHY registers (not memory-mapped) */
154 WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ && in imx6_pcie_grp_offset()
155 imx6_pcie->drvdata->variant != IMX8MM && in imx6_pcie_grp_offset()
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/Linux-v6.1/arch/arm/boot/dts/
Dimx6sl.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6sl-pinfunc.h"
7 #include <dt-bindings/clock/imx6sl-clock.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 * pre-existing /chosen node to be available to insert the
50 #address-cells = <1>;
51 #size-cells = <0>;
54 compatible = "arm,cortex-a9";
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Dimx6ul.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
57 #address-cells = <1>;
[all …]
Dimx6sll.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright 2017-2018 NXP.
8 #include <dt-bindings/clock/imx6sll-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include "imx6sll-pinfunc.h"
14 #address-cells = <1>;
15 #size-cells = <1>;
46 #address-cells = <1>;
47 #size-cells = <0>;
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Dimx6sx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6sx-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6sx-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
60 #address-cells = <1>;
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Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
[all …]
Dimx6dl.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6dl-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
22 next-level-cache = <&L2>;
23 operating-points = <
29 fsl,soc-operating-points = <
30 /* ARM kHz SOC-PU uV */
[all …]
Dimx6qdl.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/imx6qdl-clock.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 * pre-existing /chosen node to be available to insert the
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <32768>;
[all …]
Dimx53.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include "imx53-pinfunc.h"
7 #include <dt-bindings/clock/imx5-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
17 * pre-existing /chosen node to be available to insert the
50 #address-cells = <1>;
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Dimx6q.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6q-pinfunc.h"
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "arm,cortex-a9";
23 next-level-cache = <&L2>;
24 operating-points = <
32 fsl,soc-operating-points = <
33 /* ARM kHz SOC-PU uV */
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx27-pinctrl.txt4 - compatible: "fsl,imx27-iomuxc"
6 The iomuxc driver node should define subnodes containing of pinctrl configuration subnodes.
9 - fsl,pins: three integers array, represents a group of pins mux and config
21 0 - Primary function
22 1 - Alternate function
23 2 - GPIO
24 Registers: GIUS (GPIO In Use), GPR (General Purpose Register)
28 0 - Input
29 1 - Output
37 0 - A_IN
[all …]
/Linux-v6.1/drivers/phy/freescale/
Dphy-fsl-imx8m-pcie.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
19 #include <dt-bindings/phy/phy-imx8-pcie.h>
68 reset_control_assert(imx8_phy->reset); in imx8_pcie_phy_power_on()
70 pad_mode = imx8_phy->refclk_pad_mode; in imx8_pcie_phy_power_on()
72 regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, in imx8_pcie_phy_power_on()
74 imx8_phy->clkreq_unused ? in imx8_pcie_phy_power_on()
76 regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, in imx8_pcie_phy_power_on()
79 regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, in imx8_pcie_phy_power_on()
81 regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, in imx8_pcie_phy_power_on()
[all …]
/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
15 #include "imx8mp-pinfunc.h"
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/Linux-v6.1/drivers/ata/
Dahci_imx.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
20 #include <linux/hwmon-sysfs.h>
24 #define DRV_NAME "ahci-imx"
27 /* Timer 1-ms Register */
104 struct regmap *gpr; member
113 MODULE_PARM_DESC(hotplug, "AHCI IMX hot-plug support (0=Don't support, 1=support)");
137 } while (--timeout); in imx_phy_crbit_assert()
139 return timeout ? 0 : -ETIMEDOUT; in imx_phy_crbit_assert()
227 struct imx_ahci_priv *imxpriv = hpriv->plat_data; in imx_sata_phy_reset()
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/Linux-v6.1/drivers/bus/
Dimx-weim.c15 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
74 { .compatible = "fsl,imx1-weim", .data = &imx1_weim_devtype, },
76 { .compatible = "fsl,imx27-weim", .data = &imx27_weim_devtype, },
78 { .compatible = "fsl,imx50-weim", .data = &imx50_weim_devtype, },
79 { .compatible = "fsl,imx6q-weim", .data = &imx50_weim_devtype, },
81 { .compatible = "fsl,imx51-weim", .data = &imx51_weim_devtype, },
88 struct device_node *np = pdev->dev.of_node; in imx_weim_gpr_setup()
91 struct regmap *gpr; in imx_weim_gpr_setup() local
103 gpr = syscon_regmap_lookup_by_phandle(np, "fsl,weim-cs-gpr"); in imx_weim_gpr_setup()
104 if (IS_ERR(gpr)) { in imx_weim_gpr_setup()
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/Linux-v6.1/sound/soc/fsl/
Dfsl_mqs.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (C) 2014-2015 Freescale Semiconductor, Inc.
12 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
34 * struct fsl_mqs_soc_data - soc specific data
77 struct snd_soc_component *component = dai->component; in fsl_mqs_hw_params()
83 mclk_rate = clk_get_rate(mqs_priv->mclk); in fsl_mqs_hw_params()
95 regmap_update_bits(mqs_priv->regmap, mqs_priv->soc->ctrl_off, in fsl_mqs_hw_params()
96 mqs_priv->soc->div_mask, in fsl_mqs_hw_params()
97 (div - 1) << mqs_priv->soc->div_shift); in fsl_mqs_hw_params()
98 regmap_update_bits(mqs_priv->regmap, mqs_priv->soc->ctrl_off, in fsl_mqs_hw_params()
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/Linux-v6.1/drivers/gpu/drm/imx/
Ddw_hdmi-imx.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
4 * derived from imx-hdmi.c(renamed to bridge/dw_hdmi.c now)
9 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
14 #include <video/imx-ipu-v3.h>
25 #include "imx-drm.h"
43 return container_of(e, struct imx_hdmi_encoder, encoder)->hdmi; in enc_to_imx_hdmi()
113 int mux = drm_of_encoder_active_port_id(hdmi->dev->of_node, encoder); in dw_hdmi_imx_encoder_enable()
115 regmap_update_bits(hdmi->regmap, IOMUXC_GPR3, in dw_hdmi_imx_encoder_enable()
126 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24; in dw_hdmi_imx_atomic_check()
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