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/Linux-v5.15/Documentation/devicetree/bindings/power/
Dpower_domain.txt1 * Generic PM domains
3 System on chip designs are often divided into multiple PM domains that can be
8 their PM domains provided by PM domain providers. A PM domain provider can be
10 domains. A consumer node can refer to the provider by a phandle and a set of
12 #power-domain-cells property in the PM domain provider node.
16 See power-domain.yaml.
21 - power-domains : A list of PM domain specifiers, as defined by bindings of
25 - power-domain-names : A list of power domain name strings sorted in the same
26 order as the power-domains property. Consumers drivers will use
27 power-domain-names to match power domains with power-domains
[all …]
Drockchip-io-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip-io-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip SRAM for IO Voltage Domains
10 - Heiko Stuebner <heiko@sntech.de>
13 IO domain voltages on some Rockchip SoCs are variable but need to be
42 to report their voltage. The IO Voltage Domain for any non-specified
48 - rockchip,px30-io-voltage-domain
49 - rockchip,px30-pmu-io-voltage-domain
[all …]
/Linux-v5.15/drivers/gpu/drm/i915/display/
Dintel_display_power.c1 /* SPDX-License-Identifier: MIT */
169 drm_dbg_kms(&dev_priv->drm, "enabling %s\n", power_well->desc->name); in intel_power_well_enable()
170 power_well->desc->ops->enable(dev_priv, power_well); in intel_power_well_enable()
171 power_well->hw_enabled = true; in intel_power_well_enable()
177 drm_dbg_kms(&dev_priv->drm, "disabling %s\n", power_well->desc->name); in intel_power_well_disable()
178 power_well->hw_enabled = false; in intel_power_well_disable()
179 power_well->desc->ops->disable(dev_priv, power_well); in intel_power_well_disable()
185 if (!power_well->count++) in intel_power_well_get()
192 drm_WARN(&dev_priv->drm, !power_well->count, in intel_power_well_put()
194 power_well->desc->name); in intel_power_well_put()
[all …]
/Linux-v5.15/drivers/firmware/
Dscpi_pm_domain.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/io.h>
23 * These device power state values are not well-defined in the specification.
44 ret = pd->ops->device_set_power_state(pd->domain, state); in scpi_pd_power()
48 return !(state == pd->ops->device_get_power_state(pd->domain)); in scpi_pd_power()
67 struct device *dev = &pdev->dev; in scpi_pm_domain_probe()
68 struct device_node *np = dev->of_node; in scpi_pm_domain_probe()
71 struct generic_pm_domain **domains; in scpi_pm_domain_probe() local
77 return -EPROBE_DEFER; in scpi_pm_domain_probe()
81 return -ENODEV; in scpi_pm_domain_probe()
[all …]
/Linux-v5.15/arch/arm/boot/dts/
Dkeystone-k2g.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/pinctrl/keystone.h>
10 #include <dt-bindings/gpio/gpio.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
32 #address-cells = <1>;
33 #size-cells = <0>;
[all …]
Dda850.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
20 #address-cells = <1>;
21 #size-cells = <0>;
24 compatible = "arm,arm926ej-s";
28 operating-points-v2 = <&opp_table>;
32 opp_table: opp-table {
33 compatible = "operating-points-v2";
[all …]
Dr8a73a4.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/r8a73a4-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-a15";
[all …]
Dmmp2.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/marvell,mmp2.h>
8 #include <dt-bindings/power/marvell,mmp2.h>
9 #include <dt-bindings/clock/marvell,mmp2-audio.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "simple-bus";
28 interrupt-parent = <&intc>;
[all …]
/Linux-v5.15/drivers/soc/amlogic/
Dmeson-secure-pwrc.c1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <linux/io.h>
13 #include <dt-bindings/power/meson-a1-power.h>
14 #include <linux/arm-smccc.h>
28 struct meson_secure_pwrc_domain *domains; member
42 struct meson_secure_pwrc_domain_desc *domains; member
49 if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_GET, &is_off, in pwrc_secure_is_off()
50 pwrc_domain->index, 0, 0, 0, 0) < 0) in pwrc_secure_is_off()
62 if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_SET, NULL, in meson_secure_pwrc_off()
63 pwrc_domain->index, PWRC_OFF, 0, 0, 0) < 0) { in meson_secure_pwrc_off()
[all …]
/Linux-v5.15/drivers/firmware/arm_scmi/
Dscmi_pm_domain.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2021 ARM Ltd.
9 #include <linux/io.h>
37 ret = power_ops->state_set(pd->ph, pd->domain, state); in scmi_pd_power()
39 ret = power_ops->state_get(pd->ph, pd->domain, &ret_state); in scmi_pd_power()
41 return -EIO; in scmi_pd_power()
80 struct device *dev = &sdev->dev; in scmi_pm_domain_probe()
81 struct device_node *np = dev->of_node; in scmi_pm_domain_probe()
84 struct generic_pm_domain **domains; in scmi_pm_domain_probe() local
85 const struct scmi_handle *handle = sdev->handle; in scmi_pm_domain_probe()
[all …]
/Linux-v5.15/arch/powerpc/kernel/
Dpci_64.c1 // SPDX-License-Identifier: GPL-2.0-or-later
24 #include <asm/io.h>
26 #include <asm/pci-bridge.h>
29 #include <asm/ppc-pci.h>
31 /* pci_io_base -- the base address from which io bars are offsets.
35 * is mapped on the first 64K of IO space
51 /* On ppc64, we always enable PCI domains and we keep domain 0 in pcibios_init()
65 pci_bus_add_devices(hose->bus); in pcibios_init()
86 * mappings since we might have to deal with sub-page alignments in pcibios_unmap_io_space()
94 if (bus->self) { in pcibios_unmap_io_space()
[all …]
/Linux-v5.15/arch/arm64/boot/dts/ti/
Dk3-am65-mcu.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
9 mcu_conf: scm-conf@40f00000 {
10 compatible = "syscon", "simple-mfd";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 compatible = "ti,am654-phy-gmii-sel";
19 #phy-cells = <1>;
24 compatible = "ti,am654-uart";
27 clock-frequency = <96000000>;
[all …]
Dk3-j721e-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
[all …]
Dk3-j7200-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
[all …]
/Linux-v5.15/arch/arm64/boot/dts/rockchip/
Drk3399.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3399-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3399-power.h>
12 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
[all …]
/Linux-v5.15/arch/arm64/boot/dts/nvidia/
Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
7 #include <dt-bindings/power/tegra194-powergate.h>
8 #include <dt-bindings/reset/tegra194-reset.h>
9 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
10 #include <dt-bindings/memory/tegra194-mc.h>
[all …]
Dtegra186.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
[all …]
/Linux-v5.15/drivers/soc/rockchip/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 special additional settings registers for a lot of soc-components.
18 tristate "Rockchip IO domain support"
21 Say y here to enable support io domains on Rockchip SoCs. It is
22 necessary for the io domain setting of the SoC to match the
/Linux-v5.15/Documentation/vm/
Dnuma.rst14 or more CPUs, local memory, and/or IO buses. For brevity and to
19 Each of the 'cells' may be viewed as an SMP [symmetric multi-processor] subset
20 of the system--although some components necessary for a stand-alone SMP system
22 connected together with some sort of system interconnect--e.g., a crossbar or
23 point-to-point link are common types of NUMA system interconnects. Both of
33 away the cell containing the CPU or IO bus making the memory access is from the
43 [cache misses] to be to "local" memory--memory on the same cell, if any--or
52 CPUs, memory and/or IO buses. And, again, memory accesses to memory on
53 "closer" nodes--nodes that map to closer cells--will generally experience
65 the existing nodes--or the system memory for non-NUMA platforms--into multiple
[all …]
/Linux-v5.15/drivers/soc/renesas/
Drcar-sysc.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car SYSC Power management support
6 * Copyright (C) 2015-2017 Glider bvba
17 #include <linux/io.h>
19 #include <linux/soc/renesas/rcar-sysc.h>
21 #include "rcar-sysc.h"
37 * Use WFI to power off, CPG/APMU to resume ARM cores on R-Car Gen2
38 * Use PSCI on R-Car Gen3
57 #define RCAR_PD_ALWAYS_ON 32 /* Always-on power area */
88 return -EAGAIN; in rcar_sysc_pwr_on_off()
[all …]
Dr8a779a0-sysc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas R-Car V3U System Controller
12 #include <linux/io.h>
22 #include <dt-bindings/power/r8a779a0-sysc.h>
32 #define PD_ALWAYS_ON PD_NO_CR /* Always-on area */
40 int parent; /* -1 if none */
45 * SoC-specific Power Area Description
53 { "always-on", R8A779A0_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
68 { "3dg-a", R8A779A0_PD_3DG_A, R8A779A0_PD_ALWAYS_ON },
69 { "3dg-b", R8A779A0_PD_3DG_B, R8A779A0_PD_3DG_A },
[all …]
Drmobile-sysc.c1 // SPDX-License-Identifier: GPL-2.0
9 * based on pm-sh7372.c
22 #include <asm/io.h>
49 unsigned int mask = BIT(rmobile_pd->bit_shift); in rmobile_pd_power_down()
51 if (rmobile_pd->suspend) { in rmobile_pd_power_down()
52 int ret = rmobile_pd->suspend(); in rmobile_pd_power_down()
58 if (readl(rmobile_pd->base + PSTR) & mask) { in rmobile_pd_power_down()
60 writel(mask, rmobile_pd->base + SPDCR); in rmobile_pd_power_down()
62 for (retry_count = PSTR_RETRIES; retry_count; retry_count--) { in rmobile_pd_power_down()
63 if (!(readl(rmobile_pd->base + SPDCR) & mask)) in rmobile_pd_power_down()
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/display/ti/
Dti,am65x-dss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/display/ti/ti,am65x-dss.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Jyri Sarha <jsarha@ti.com>
12 - Tomi Valkeinen <tomi.valkeinen@ti.com>
22 const: ti,am65x-dss
28 - description: common DSS register area
29 - description: VIDL1 light video plane
30 - description: VID video plane
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/net/
Dti,k3-am654-cpsw-nuss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,k3-am654-cpsw-nuss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Grygorii Strashko <grygorii.strashko@ti.com>
11 - Sekhar Nori <nsekhar@ti.com>
22 Complex (UDMA-P) controller.
52 "#address-cells": true
53 "#size-cells": true
57 - ti,am654-cpsw-nuss
[all …]
/Linux-v5.15/drivers/firmware/imx/
Dscu-pd.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
7 * Implementation of the SCU based Power Domains
10 * single global power domain and implement the ->attach|detach_dev()
12 * From within the ->attach_dev(), we could get the OF node for
13 * the device that is being attached and then parse the power-domain
18 * Additionally, we need to implement the ->stop() and ->start()
20 * rather than using the above ->power_on|off() callbacks.
23 * 1. The ->attach_dev() of power domain infrastructure still does
24 * not support multi domains case as the struct device *dev passed
[all …]

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