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Searched +full:intc +full:- +full:nr +full:- +full:irqs (Results 1 – 11 of 11) sorted by relevance

/Linux-v5.10/Documentation/devicetree/bindings/interrupt-controller/
Dmrvl,intc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/mrvl,intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thomas Gleixner <tglx@linutronix.de>
11 - Jason Cooper <jason@lakedaemon.net>
12 - Marc Zyngier <maz@kernel.org>
13 - Rob Herring <robh+dt@kernel.org>
16 - if:
21 const: marvell,orion-intc
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/Linux-v5.10/arch/arm/boot/dts/
Dmmp3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/marvell,mmp2.h>
7 #include <dt-bindings/power/marvell,mmp2.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
17 enable-method = "marvell,mmp3-smp";
22 next-level-cache = <&l2>;
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Dmmp2.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/marvell,mmp2.h>
8 #include <dt-bindings/power/marvell,mmp2.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
24 #address-cells = <1>;
25 #size-cells = <1>;
26 compatible = "simple-bus";
27 interrupt-parent = <&intc>;
30 L2: l2-cache {
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Dpxa168.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/marvell,pxa168.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <1>;
24 compatible = "simple-bus";
25 interrupt-parent = <&intc>;
29 compatible = "mrvl,axi-bus", "simple-bus";
30 #address-cells = <1>;
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Dpxa910.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/marvell,pxa910.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <1>;
24 compatible = "simple-bus";
25 interrupt-parent = <&intc>;
28 L2: l2-cache {
29 compatible = "marvell,tauros2-cache";
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Dpxa25x.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "dt-bindings/clock/pxa-clock.h"
17 #address-cells = <1>;
18 #size-cells = <1>;
22 compatible = "marvell,pxa250-core-clocks";
23 #clock-cells = <1>;
29 compatible = "fixed-clock";
30 #clock-cells = <0>;
31 clock-frequency = <3686400>;
32 clock-output-names = "ostimer";
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Dpxa2xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * pxa2xx.dtsi - Device Tree Include file for Marvell PXA2xx family SoC
8 #include "dt-bindings/clock/pxa-clock.h"
12 mux- ## func { \
17 mux- ## func { \
20 low-power-disable; \
23 mux- ## func { \
26 low-power-enable; \
30 #address-cells = <1>;
31 #size-cells = <1>;
[all …]
Dpxa27x.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include "dt-bindings/clock/pxa-clock.h"
11 pdma: dma-controller@40000000 {
12 compatible = "marvell,pdma-1.0";
15 #dma-channels = <32>;
16 #dma-cells = <2>;
17 #dma-requests = <75>;
21 pxairq: interrupt-controller@40d00000 {
22 marvell,intc-priority;
23 marvell,intc-nr-irqs = <34>;
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Dpxa3xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
8 (gpio <= 98) ? (0x0400 + 4 * (gpio - 27)) : \
9 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
18 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
19 (gpio <= 29) ? (0x0400 + 4 * (gpio - 27)) : \
20 (gpio <= 98) ? (0x0418 + 4 * (gpio - 30)) : \
21 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
23 (gpio <= 268) ? (0x052c + 4 * (gpio - 263)) : \
33 (gpio <= 9) ? (0x028c + 4 * (gpio - 5)) : \
[all …]
/Linux-v5.10/arch/arm/mach-pxa/
Dirq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-pxa/irq.c
24 #include <mach/irqs.h>
36 ((i) < 64) ? (0x0b0 + (((i) - 32) << 2)) : \
37 (0x144 + (((i) - 64) << 2)))
45 * This is for peripheral IRQs internal to the PXA chip.
103 handle_IRQ(PXA_IRQ(fls(mask) - 1), regs); in icip_handle_irq()
159 __raw_writel(0, base + ICMR); /* disable all IRQs */ in pxa_init_irq_common()
160 __raw_writel(0, base + ICLR); /* all IRQs are IRQ, not FIQ */ in pxa_init_irq_common()
229 { .compatible = "marvell,pxa-intc", },
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/Linux-v5.10/drivers/irqchip/
Dirq-mmp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-mmp/irq.c
6 * Copyright (C) 2008 - 2012 Marvell Technology Group Ltd.
69 struct irq_domain *domain = d->domain; in icu_mask_ack_irq()
70 struct icu_chip_data *data = (struct icu_chip_data *)domain->host_data; in icu_mask_ack_irq()
74 hwirq = d->irq - data->virq_base; in icu_mask_ack_irq()
77 r &= ~data->conf_mask; in icu_mask_ack_irq()
78 r |= data->conf_disable; in icu_mask_ack_irq()
82 if ((data->virq_base == data->clr_mfp_irq_base) in icu_mask_ack_irq()
83 && (hwirq == data->clr_mfp_hwirq)) in icu_mask_ack_irq()
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