Searched +full:imx8qxp +full:- +full:mipi +full:- +full:dphy (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/phy/mixel,mipi-dsi-phy.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Guido Günther <agx@sigxcpu.org>13 The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the14 MIPI-DSI IP from Northwest Logic). It represents the physical layer for the18 in either MIPI-DSI PHY mode or LVDS PHY mode.23 - fsl,imx8mq-mipi-dphy24 - fsl,imx8qxp-mipi-dphy[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/mfd/fsl,imx8qxp-csr.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Liu Ying <victor.liu@nxp.com>17 use-case is for some other nodes to acquire a reference to the syscon node18 by phandle, and the other typical use-case is that the operating system23 pattern: "^syscon@[0-9a-f]+$"27 - enum:28 - fsl,imx8qxp-mipi-lvds-csr[all …]
1 // SPDX-License-Identifier: GPL-2.0+9 #include <linux/clk-provider.h>22 #include <dt-bindings/firmware/imx/rsrc.h>35 /* DPHY registers */63 ((x) < 32) ? 0xe0 | ((x) - 16) : \64 ((x) < 64) ? 0xc0 | ((x) - 32) : \65 ((x) < 128) ? 0x80 | ((x) - 64) : \66 ((x) - 128))67 #define CN(x) (((x) == 1) ? 0x1f : (((CN_BUF) >> ((x) - 1)) & 0x1f))68 #define CO(x) ((CO_BUF) >> (8 - (x)) & 0x03)[all …]
