Searched +full:imx6sx +full:- +full:ocotp (Results 1 – 16 of 16) sorted by relevance
| /Linux-v5.15/Documentation/devicetree/bindings/nvmem/ |
| D | imx-ocotp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings 10 - Anson Huang <Anson.Huang@nxp.com> 13 This binding represents the on-chip eFuse OTP controller found on 18 - $ref: "nvmem.yaml#" 23 - items: 24 - enum: [all …]
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| /Linux-v5.15/Documentation/devicetree/bindings/thermal/ |
| D | imx-thermal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/thermal/imx-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Guo <shawnguo@kernel.org> 11 - Anson Huang <Anson.Huang@nxp.com> 16 - fsl,imx6q-tempmon 17 - fsl,imx6sx-tempmon 18 - fsl,imx7d-tempmon 32 nvmem-cells: [all …]
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| /Linux-v5.15/arch/arm/boot/dts/ |
| D | imx6ull.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include "imx6ull-pinfunc.h" 7 #include "imx6ull-pinfunc-snvs.h" 9 /* Delete UART8 in AIPS-1 (i.MX6UL specific) */ 10 /delete-node/ &uart8; 11 /* Delete CAAM node in AIPS-2 (i.MX6UL specific) */ 12 /delete-node/ &crypto; 15 clock-frequency = <900000000>; 16 operating-points = < 24 fsl,soc-operating-points = < [all …]
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| D | imx6sx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6sx-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6sx-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 60 #address-cells = <1>; [all …]
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| D | imx7ulp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright 2017-2018 NXP 8 #include <dt-bindings/clock/imx7ulp-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include "imx7ulp-pinfunc.h" 15 interrupt-parent = <&intc>; 17 #address-cells = <1>; 18 #size-cells = <1>; 37 #address-cells = <1>; [all …]
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| D | imx7s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/imx7d-clock.h> 7 #include <dt-bindings/power/imx7-power.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/reset/imx7-reset.h> 12 #include "imx7d-pinfunc.h" 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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| D | imx6ul.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6ul-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6ul-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 57 #address-cells = <1>; [all …]
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| D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx6sll-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 46 #address-cells = <1>; 47 #size-cells = <0>; [all …]
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| /Linux-v5.15/drivers/soc/imx/ |
| D | soc-imx.c | 1 // SPDX-License-Identifier: GPL-2.0 32 struct regmap *ocotp = NULL; in imx_soc_device_init() local 44 return -ENOMEM; in imx_soc_device_init() 46 soc_dev_attr->family = "Freescale i.MX"; in imx_soc_device_init() 49 ret = of_property_read_string(root, "model", &soc_dev_attr->machine); in imx_soc_device_init() 77 ocotp_compat = "fsl,imx51-iim"; in imx_soc_device_init() 81 ocotp_compat = "fsl,imx53-iim"; in imx_soc_device_init() 85 ocotp_compat = "fsl,imx6sl-ocotp"; in imx_soc_device_init() 89 ocotp_compat = "fsl,imx6q-ocotp"; in imx_soc_device_init() 93 ocotp_compat = "fsl,imx6sx-ocotp"; in imx_soc_device_init() [all …]
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| /Linux-v5.15/drivers/nvmem/ |
| D | imx-ocotp.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * i.MX6 OCOTP fusebox driver 9 * Based on the barebox ocotp driver, 14 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc 21 #include <linux/nvmem-provider.h> 107 void __iomem *base = priv->base; in imx_ocotp_wait_for_busy() 109 bm_ctrl_busy = priv->params->ctrl.bm_busy; in imx_ocotp_wait_for_busy() 110 bm_ctrl_error = priv->params->ctrl.bm_error; in imx_ocotp_wait_for_busy() 114 for (count = 10000; count >= 0; count--) { in imx_ocotp_wait_for_busy() 124 * - A write is performed to a shadow register during a shadow in imx_ocotp_wait_for_busy() [all …]
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| /Linux-v5.15/arch/arm64/boot/dts/freescale/ |
| D | imx8mp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mp-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 12 #include "imx8mp-pinfunc.h" 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; [all …]
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| D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mn-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 12 #include "imx8mn-pinfunc.h" 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; [all …]
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| D | imx8mm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mm-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 12 #include "imx8mm-pinfunc.h" 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; [all …]
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| D | imx8mq.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de> 7 #include <dt-bindings/clock/imx8mq-clock.h> 8 #include <dt-bindings/power/imx8mq-power.h> 9 #include <dt-bindings/reset/imx8mq-reset.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include "dt-bindings/input/input.h" 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/interconnect/imx8mq.h> [all …]
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| /Linux-v5.15/drivers/clk/imx/ |
| D | clk-imx6sx.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include <dt-bindings/clock/imx6sx-clock.h> 10 #include <linux/clk-provider.h> 130 clk_hw_data->num = IMX6SX_CLK_CLK_END; in imx6sx_clocks_init() 131 hws = clk_hw_data->hws; in imx6sx_clocks_init() 146 np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-anatop"); in imx6sx_clocks_init() 177 clk_set_parent(hws[IMX6SX_PLL1_BYPASS]->clk, hws[IMX6SX_CLK_PLL1]->clk); in imx6sx_clocks_init() 178 clk_set_parent(hws[IMX6SX_PLL2_BYPASS]->clk, hws[IMX6SX_CLK_PLL2]->clk); in imx6sx_clocks_init() 179 clk_set_parent(hws[IMX6SX_PLL3_BYPASS]->clk, hws[IMX6SX_CLK_PLL3]->clk); in imx6sx_clocks_init() 180 clk_set_parent(hws[IMX6SX_PLL4_BYPASS]->clk, hws[IMX6SX_CLK_PLL4]->clk); in imx6sx_clocks_init() [all …]
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| /Linux-v5.15/drivers/thermal/ |
| D | imx_thermal.c | 1 // SPDX-License-Identifier: GPL-2.0 17 #include <linux/nvmem-consumer.h> 217 const struct thermal_soc_data *soc_data = data->socdata; in imx_set_panic_temp() 218 struct regmap *map = data->tempmon; in imx_set_panic_temp() 221 critical_value = (data->c2 - panic_temp) / data->c1; in imx_set_panic_temp() 223 regmap_write(map, soc_data->panic_alarm_ctrl + REG_CLR, in imx_set_panic_temp() 224 soc_data->panic_alarm_mask); in imx_set_panic_temp() 225 regmap_write(map, soc_data->panic_alarm_ctrl + REG_SET, in imx_set_panic_temp() 226 critical_value << soc_data->panic_alarm_shift); in imx_set_panic_temp() 232 struct regmap *map = data->tempmon; in imx_set_alarm_temp() [all …]
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