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/Linux-v6.6/drivers/ufs/core/
Dufshcd-crypto.c1 // SPDX-License-Identifier: GPL-2.0
7 #include "ufshcd-crypto.h"
9 /* Blk-crypto modes supported by UFS crypto */
20 static int ufshcd_program_key(struct ufs_hba *hba, in ufshcd_program_key() argument
24 u32 slot_offset = hba->crypto_cfg_register + slot * sizeof(*cfg); in ufshcd_program_key()
27 ufshcd_hold(hba); in ufshcd_program_key()
29 if (hba->vops && hba->vops->program_key) { in ufshcd_program_key()
30 err = hba->vops->program_key(hba, cfg, slot); in ufshcd_program_key()
35 ufshcd_writel(hba, 0, slot_offset + 16 * sizeof(cfg->reg_val[0])); in ufshcd_program_key()
37 ufshcd_writel(hba, le32_to_cpu(cfg->reg_val[i]), in ufshcd_program_key()
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Dufshcd.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2011-2013 Samsung India Software Operations
5 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
17 #include <linux/blk-pm.h>
30 #include "ufshcd-priv.h"
33 #include "ufs-sysfs.h"
34 #include "ufs-debugfs.h"
35 #include "ufs-fault-injection.h"
37 #include "ufshcd-crypto.h"
74 /* maximum number of link-startup retries */
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/Linux-v6.6/Documentation/devicetree/bindings/ata/
Dahci-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/ahci-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hans de Goede <hdegoede@redhat.com>
11 - Damien Le Moal <dlemoal@kernel.org>
18 document doesn't constitute a DT-node binding by itself but merely
19 defines a set of common properties for the AHCI-compatible devices.
24 - $ref: sata-common.yaml#
32 reg-names:
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Dahci-platform.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 SATA nodes are defined to describe on-chip Serial ATA controllers.
13 It is possible, but not required, to represent each port as a sub-node.
18 - Hans de Goede <hdegoede@redhat.com>
19 - Jens Axboe <axboe@kernel.dk>
26 - brcm,iproc-ahci
27 - cavium,octeon-7130-ahci
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Dsnps,dwc-ahci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/snps,dwc-ahci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Serge Semin <fancer.lancer@gmail.com>
20 - snps,dwc-ahci
21 - snps,spear-ahci
23 - compatible
26 - $ref: snps,dwc-ahci-common.yaml#
31 - description: Synopsys AHCI SATA-compatible devices
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Drockchip,dwc-ahci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Serge Semin <fancer.lancer@gmail.com>
22 - rockchip,rk3568-dwc-ahci
23 - rockchip,rk3588-dwc-ahci
25 - compatible
30 - enum:
31 - rockchip,rk3568-dwc-ahci
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/Linux-v6.6/drivers/ufs/host/
Dufs-qcom.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2016, Linux Foundation. All rights reserved.
16 #include <linux/reset-controller.h>
22 #include "ufshcd-pltfrm.h"
24 #include "ufs-qcom.h"
96 static int ufs_qcom_set_dme_vs_core_clk_ctrl_clear_div(struct ufs_hba *hba,
108 if (host->hba->caps & UFSHCD_CAP_CRYPTO) in ufs_qcom_ice_enable()
109 qcom_ice_enable(host->ice); in ufs_qcom_ice_enable()
114 struct ufs_hba *hba = host->hba; in ufs_qcom_ice_init() local
115 struct device *dev = hba->dev; in ufs_qcom_ice_init()
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Dufs-hisi.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2016-2017 Linaro Ltd.
6 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
14 #include <linux/dma-mapping.h>
19 #include "ufshcd-pltfrm.h"
21 #include "ufs-hisi.h"
25 static int ufs_hisi_check_hibern8(struct ufs_hba *hba) in ufs_hisi_check_hibern8() argument
33 err = ufshcd_dme_get(hba, UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE, 0), in ufs_hisi_check_hibern8()
35 err |= ufshcd_dme_get(hba, in ufs_hisi_check_hibern8()
50 err = ufshcd_dme_get(hba, UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE, 0), in ufs_hisi_check_hibern8()
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/Linux-v6.6/drivers/s390/scsi/
Dzfcp_dbf.c1 // SPDX-License-Identifier: GPL-2.0
36 return sizeof(struct zfcp_dbf_pay) + offset - ZFCP_DBF_PAY_MAX_REC; in zfcp_dbf_plen()
43 struct zfcp_dbf_pay *pl = &dbf->pay_buf; in zfcp_dbf_pl_write()
46 spin_lock(&dbf->pay_lock); in zfcp_dbf_pl_write()
48 pl->fsf_req_id = req_id; in zfcp_dbf_pl_write()
49 memcpy(pl->area, area, ZFCP_DBF_TAG_LEN); in zfcp_dbf_pl_write()
53 (u16) (length - offset)); in zfcp_dbf_pl_write()
54 memcpy(pl->data, data + offset, rec_length); in zfcp_dbf_pl_write()
55 debug_event(dbf->pay, 1, pl, zfcp_dbf_plen(rec_length)); in zfcp_dbf_pl_write()
58 pl->counter++; in zfcp_dbf_pl_write()
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/Linux-v6.6/drivers/ata/
Dlibahci_platform.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2004-2005 Red Hat, Inc.
37 * ahci_platform_enable_phys - Enable PHYs
40 * This function enables all the PHYs found in hpriv->phys, if any.
51 for (i = 0; i < hpriv->nports; i++) { in ahci_platform_enable_phys()
52 rc = phy_init(hpriv->phys[i]); in ahci_platform_enable_phys()
56 rc = phy_set_mode(hpriv->phys[i], PHY_MODE_SATA); in ahci_platform_enable_phys()
58 phy_exit(hpriv->phys[i]); in ahci_platform_enable_phys()
62 rc = phy_power_on(hpriv->phys[i]); in ahci_platform_enable_phys()
64 phy_exit(hpriv->phys[i]); in ahci_platform_enable_phys()
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Dlibahci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * libahci.c - Common AHCI SATA low-level routines
6 * Please ALWAYS copy linux-ide@vger.kernel.org
9 * Copyright 2004-2005 Red Hat, Inc.
12 * as Documentation/driver-api/libata.rst
27 #include <linux/dma-mapping.h>
236 * ahci_rpm_get_port - Make sure the port is powered on
245 return pm_runtime_get_sync(ap->dev); in ahci_rpm_get_port()
249 * ahci_rpm_put_port - Undoes ahci_rpm_get_port()
257 pm_runtime_put(ap->dev); in ahci_rpm_put_port()
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Dacard-ahci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * acard-ahci.c - ACard AHCI SATA support
7 * Please ALWAYS copy linux-ide@vger.kernel.org
13 * as Documentation/driver-api/libata.rst
26 #include <linux/dma-mapping.h>
35 #define DRV_NAME "acard-ahci"
70 AHCI_SHT("acard-ahci"),
115 struct ahci_host_priv *hpriv = host->private_data; in acard_ahci_pci_device_suspend()
116 void __iomem *mmio = hpriv->mmio; in acard_ahci_pci_device_suspend()
120 hpriv->flags & AHCI_HFLAG_NO_SUSPEND) { in acard_ahci_pci_device_suspend()
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Dahci_dwc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
25 #define DRV_NAME "ahci-dwc"
95 /* Baikal-T1 AHCI SATA specific registers */
127 struct ahci_dwc_host_priv *dpriv = hpriv->plat_data; in ahci_bt1_init()
134 dev_err(&dpriv->pdev->dev, "No system clocks specified\n"); in ahci_bt1_init()
135 return -EINVAL; in ahci_bt1_init()
145 dev_err(&dpriv->pdev->dev, "Couldn't assert the resets\n"); in ahci_bt1_init()
151 dev_err(&dpriv->pdev->dev, "Couldn't de-assert the resets\n"); in ahci_bt1_init()
163 dpriv = devm_kzalloc(&pdev->dev, sizeof(*dpriv), GFP_KERNEL); in ahci_dwc_get_resources()
165 return ERR_PTR(-ENOMEM); in ahci_dwc_get_resources()
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Dsata_highbank.c1 // SPDX-License-Identifier: GPL-2.0-only
53 /* Each of the 6 phys can have up to 4 sata ports attached to i. Map 0-based
91 return 1 << (3 * pdata->port_to_sgpio[port] + shift); in sgpio_bit_shift()
97 pdata->sgpio_pattern |= sgpio_bit_shift(pdata, port, in ecx_parse_sgpio()
100 pdata->sgpio_pattern &= ~sgpio_bit_shift(pdata, port, in ecx_parse_sgpio()
103 pdata->sgpio_pattern |= sgpio_bit_shift(pdata, port, in ecx_parse_sgpio()
106 pdata->sgpio_pattern &= ~sgpio_bit_shift(pdata, port, in ecx_parse_sgpio()
109 pdata->sgpio_pattern |= sgpio_bit_shift(pdata, port, in ecx_parse_sgpio()
112 pdata->sgpio_pattern &= ~sgpio_bit_shift(pdata, port, in ecx_parse_sgpio()
122 gpiod_set_value(pdata->sgpio_gpiod[SCLOCK], 1); in ecx_led_cycle_clock()
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Dahci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ahci.c - AHCI SATA support
6 * Please ALWAYS copy linux-ide@vger.kernel.org
9 * Copyright 2004-2005 Red Hat, Inc.
12 * as Documentation/driver-api/libata.rst
25 #include <linux/dma-mapping.h>
32 #include <linux/ahci-remap.h>
33 #include <linux/io-64-nonatomic-lo-hi.h>
257 { PCI_VDEVICE(INTEL, 0x06d6), board_ahci }, /* Comet Lake PCH-H RAID */
267 { PCI_VDEVICE(INTEL, 0x27c6), board_ahci }, /* ICH7-M DH */
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/Linux-v6.6/include/scsi/
Dscsi_host.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #include <linux/blk-mq.h>
31 * enum scsi_timeout_action - How to handle a command that timed out.
49 * Additional per-command data allocated for the driver.
59 * command. It must also push it to the HBA if the scsi_cmnd
77 * For compatibility, any other non-zero return is treated the
123 * When unknown ioctl is passed return -ENOIOCTLCMD.
136 * define one of these if you don't want to - there is a default
139 * own strategy routine, this is where it is specified. Note - the
168 * Return values: 0 on success, non-0 on failure
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/Linux-v6.6/drivers/char/agp/
Dparisc-agp.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2006, Kyle McMartin <kyle@parisc-linux.org>
7 * Based on drivers/char/agpgart/hp-agp.c which is
8 * (c) Copyright 2002, 2003 Hewlett-Packard Development Company, L.P.
20 #include <asm/parisc-device.h>
71 agp_bridge->current_size = (void *) &parisc_agp_sizes[0]; in parisc_agp_fetch_size()
81 agp_bridge->gart_bus_addr = info->gart_base; in parisc_agp_configure()
82 agp_bridge->capndx = info->lba_cap_offset; in parisc_agp_configure()
83 agp_bridge->mode = readl(info->lba_regs+info->lba_cap_offset+PCI_AGP_STATUS); in parisc_agp_configure()
96 writeq(info->gart_base | ilog2(info->gart_size), info->ioc_regs+IOC_PCOM); in parisc_agp_tlbflush()
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/Linux-v6.6/arch/arm64/boot/dts/rockchip/
Drk3588.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "rk3588-pinctrl.dtsi"
11 compatible = "rockchip,rk3588-pcie3-phy-grf", "syscon";
16 compatible = "rockchip,rk3588-pipe-phy-grf", "syscon";
21 compatible = "rockchip,rk3588-i2s-tdm";
25 clock-names = "mclk_tx", "mclk_rx", "hclk";
26 assigned-clocks = <&cru CLK_I2S8_8CH_TX_SRC>;
27 assigned-clock-parents = <&cru PLL_AUPLL>;
29 dma-names = "tx";
30 power-domains = <&power RK3588_PD_VO0>;
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Drk3588s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rk3588-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/power/rk3588-power.h>
10 #include <dt-bindings/reset/rockchip,rk3588-cru.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/ata/ahci.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
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/Linux-v6.6/drivers/scsi/
Dhpsa.h3 * Copyright (c) 2019-2020 Microchip Technology Inc. and its subsidiaries
5 * Copyright 2014-2015 PMC-Sierra, Inc.
6 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
74 unsigned char vendor[8]; /* bytes 8-15 of inquiry data */
75 unsigned char model[16]; /* bytes 16-31 of inquiry data */
113 int external; /* 1-from external array 0-not <0-unknown */
216 spinlock_t devlock; /* to protect hba[ctlr]->dev[]; */
227 /* cap concurrent passthrus at some reasonable maximum */
256 /* Address of h->q[x] is passed to intr handler to know which queue */
258 char intrname[MAX_REPLY_QUEUES][16]; /* "hpsa0-msix00" names */
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/Linux-v6.6/drivers/scsi/qla2xxx/
Dqla_bsg.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * QLogic Fibre Channel HBA Driver
4 * Copyright (c) 2003-2014 QLogic Corporation
12 #include <linux/bsg-lib.h>
25 struct bsg_job *bsg_job = sp->u.bsg_job; in qla2x00_bsg_job_done()
26 struct fc_bsg_reply *bsg_reply = bsg_job->reply; in qla2x00_bsg_job_done()
28 ql_dbg(ql_dbg_user, sp->vha, 0x7009, in qla2x00_bsg_job_done()
30 __func__, sp->handle, res, bsg_job); in qla2x00_bsg_job_done()
33 kref_put(&sp->cmd_kref, qla2x00_sp_release); in qla2x00_bsg_job_done()
35 bsg_reply->result = res; in qla2x00_bsg_job_done()
[all …]
Dqla_os.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * QLogic Fibre Channel HBA Driver
4 * Copyright (c) 2003-2014 QLogic Corporation
15 #include <linux/blk-mq-pci.h>
65 "Enable/disable security. 0(Default) - Security disabled. 1 - Security enabled.");
71 "beginning. Default is 0 - class 2 not supported.");
83 "a PORT-DOWN status.");
90 "Default is 0 - no PLOGI. 1 - perform PLOGI.");
101 "during HBA initialization. Memory allocation requirements "
102 "vary by ISP type. Default is 1 - allocate memory.");
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/Linux-v6.6/drivers/nvme/host/
Dcore.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (c) 2011-2014, Intel Corporation.
8 #include <linux/blk-mq.h>
9 #include <linux/blk-integrity.h>
16 #include <linux/backing-dev.h>
27 #include <linux/nvme-auth.h>
92 * nvme_wq - hosts nvme related works that are not reset or delete
93 * nvme_reset_wq - hosts nvme reset works
94 * nvme_delete_wq - hosts nvme delete works
97 * keep-alive, periodic reconnects etc. nvme_reset_wq
[all …]
/Linux-v6.6/arch/parisc/kernel/
Dhardware.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Based on the document "PA-RISC 1.1 I/O Firmware Architecture
73 {HPHW_NPROC,0x312,0x4,0x81,"Strider-50 (715S/50)"},
74 {HPHW_NPROC,0x313,0x4,0x81,"Strider-33 (715S/33)"},
75 {HPHW_NPROC,0x314,0x4,0x81,"Trailways-50 (715T/50)"},
76 {HPHW_NPROC,0x315,0x4,0x81,"Trailways-33 (715T/33)"},
87 {HPHW_NPROC,0x482,0x4,0x81,"WB-80 (E35)"},
88 {HPHW_NPROC,0x483,0x4,0x81,"WB-96 (E45)"},
89 {HPHW_NPROC,0x484,0x4,0x81,"UL Proc L-100 (811/D210,D310)"},
90 {HPHW_NPROC,0x485,0x4,0x81,"UL Proc L-75 (801/D200)"},
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/Linux-v6.6/drivers/scsi/csiostor/
Dcsio_hw.c4 * Copyright (c) 2008-2012 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
64 {"T580-Dbg 10G", "Chelsio T580-Dbg 10G [FCoE]"},
65 {"T520-CR 10G", "Chelsio T520-CR 10G [FCoE]"},
66 {"T522-CR 10G/1G", "Chelsio T522-CR 10G/1G [FCoE]"},
67 {"T540-CR 10G", "Chelsio T540-CR 10G [FCoE]"},
68 {"T520-BCH 10G", "Chelsio T520-BCH 10G [FCoE]"},
69 {"T540-BCH 10G", "Chelsio T540-BCH 10G [FCoE]"},
70 {"T540-CH 10G", "Chelsio T540-CH 10G [FCoE]"},
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