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/Linux-v6.1/arch/s390/crypto/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 menu "Accelerated Cryptographic Algorithms for CPU (s390)"
18 tristate "Hash functions: SHA-384 and SHA-512"
22 SHA-384 and SHA-512 secure hash algorithms (FIPS 180)
29 tristate "Hash functions: SHA-1"
33 SHA-1 secure hash algorithm (FIPS 180)
40 tristate "Hash functions: SHA-224 and SHA-256"
44 SHA-224 and SHA-256 secure hash algorithms (FIPS 180)
51 tristate "Hash functions: SHA3-224 and SHA3-256"
55 SHA3-224 and SHA3-256 secure hash algorithms (FIPS 202)
[all …]
/Linux-v6.1/Documentation/networking/
Dscaling.rst1 .. SPDX-License-Identifier: GPL-2.0
13 multi-processor systems.
17 - RSS: Receive Side Scaling
18 - RPS: Receive Packet Steering
19 - RFS: Receive Flow Steering
20 - Accelerated Receive Flow Steering
21 - XPS: Transmit Packet Steering
28 (multi-queue). On reception, a NIC can send different packets to different
33 generally known as “Receive-side Scaling” (RSS). The goal of RSS and
35 Multi-queue distribution can also be used for traffic prioritization, but
[all …]
/Linux-v6.1/crypto/
Dpolyval-generic.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2007 Nokia Siemens Networks - Mikko Herranen <mh1@iki.fi>
12 * Code based on crypto/ghash-generic.c
15 * modulus for finite field multiplication which makes hardware accelerated
16 * implementations on little-endian machines faster. POLYVAL is used in the
17 * kernel to implement HCTR2, but was originally specified for AES-GCM-SIV
21 * Length-preserving encryption with HCTR2:
23 * AES-GCM-SIV: Nonce Misuse-Resistant Authenticated Encryption:
33 * field by computing x*REVERSE(a), where REVERSE reverses the byte-ordering of
35 * POLYVAL field by computing REVERSE(x^{-1}*a). For more information, see:
[all …]
/Linux-v6.1/include/linux/
Dif_vlan.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
23 * According to 802.3ac, the packet can be 4 bytes longer. --Klika Jan
31 * struct vlan_hdr - vlan header
41 * struct vlan_ethhdr - vlan ethernet header (ethhdr + vlan_hdr)
76 return dev->priv_flags & IFF_802_1Q_VLAN; in is_vlan_dev()
79 #define skb_vlan_tag_present(__skb) ((__skb)->vlan_present)
80 #define skb_vlan_tag_get(__skb) ((__skb)->vlan_tci)
81 #define skb_vlan_tag_get_id(__skb) ((__skb)->vlan_tci & VLAN_VID_MASK)
82 #define skb_vlan_tag_get_cfi(__skb) (!!((__skb)->vlan_tci & VLAN_CFI_MASK))
83 #define skb_vlan_tag_get_prio(__skb) (((__skb)->vlan_tci & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT)
[all …]
/Linux-v6.1/Documentation/fb/
Dmatroxfb.rst16 * Most important: boot logo :-)
34 box) and matroxfb (for graphics mode). You should not compile-in vesafb
35 unless you have primary display on non-Matrox VBE2.0 device (see
43 -------------
58 -------------------------
73 ----------
86 Non-listed number can be achieved by more complicated command-line, for
93 XF{68,86}_FBDev should work just fine, but it is non-accelerated. On non-intel
97 Running another (accelerated) X-Server like XF86_SVGA works too. But (at least)
99 head, not even talking about second). Running XFree86 4.x accelerated mga
[all …]
/Linux-v6.1/drivers/net/ethernet/mellanox/mlx5/core/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
16 Core driver for low level functionality of the ConnectX-4 and
17 Connect-IB cards by Mellanox Technologies.
27 sandbox-specific client drivers.
35 Ethernet support in Mellanox Technologies ConnectX-4 NIC.
38 bool "Mellanox MLX5 ethernet accelerated receive flow steering (ARFS) support"
42 Mellanox MLX5 ethernet hardware-accelerated receive flow steering support,
60 Mellanox Technologies Ethernet Multi-Physical Function Switch (MPFS)
61 support in ConnectX NIC. MPFs is required for when multi-PF configuration
66 bool "Mellanox Technologies MLX5 SRIOV E-Switch support"
[all …]
/Linux-v6.1/drivers/video/fbdev/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
18 hardware. It represents the frame buffer of some video hardware and
19 allows application software to access the graphics hardware through
20 a well-defined interface, so the software doesn't need to know
21 anything about the low-level (hardware register) stuff.
27 On several non-X86 architectures, the frame buffer device is the
28 only way to use the graphics hardware.
35 and the Framebuffer-HOWTO at
36 <http://www.munted.org.uk/programming/Framebuffer-HOWTO-1.3.html> for more
40 are compiling a kernel for a non-x86 architecture.
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/crypto/
Dintel,keembay-ocs-aes.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-aes.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Daniele Alessandrelli <daniele.alessandrelli@intel.com>
14 hardware-accelerated AES/SM4 encryption/decryption.
18 const: intel,keembay-ocs-aes
30 - compatible
31 - reg
32 - interrupts
[all …]
Dintel,keembay-ocs-hcu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-hcu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Declan Murphy <declan.murphy@intel.com>
11 - Daniele Alessandrelli <daniele.alessandrelli@intel.com>
15 provides hardware-accelerated hashing and HMAC.
19 const: intel,keembay-ocs-hcu
31 - compatible
32 - reg
[all …]
/Linux-v6.1/arch/powerpc/crypto/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 menu "Accelerated Cryptographic Algorithms for CPU (powerpc)"
14 - AltiVec extensions
26 - AltiVec extensions
31 tristate "CRC32c and CRC32T10DIF hardware acceleration tester"
48 tristate "Hash functions: SHA-1"
51 SHA-1 secure hash algorithm (FIPS 180)
56 tristate "Hash functions: SHA-1 (SPE)"
59 SHA-1 secure hash algorithm (FIPS 180)
62 - SPE (Signal Processing Engine) extensions
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/leds/
Dleds-spi-byte.txt4 - one LED is controlled by a single byte on MOSI
5 - the value of the byte gives the brightness between two values (lowest to
7 - no return value is necessary (no MISO signal)
12 Depending on the compatible string some special functions (like hardware
13 accelerated blinking) might can be supported too.
16 configured in a sub-node in the device node.
19 - compatible: should be one of
20 * "ubnt,acb-spi-led" microcontroller (SONiX 8F26E611LA) based device
23 Property rules described in Documentation/devicetree/bindings/spi/spi-bus.txt
26 LED sub-node properties:
[all …]
/Linux-v6.1/drivers/net/ethernet/sfc/siena/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
9 This driver supports 10-gigabit Ethernet cards based on
13 will be called sfc-siena.
15 bool "Solarflare SFC9000-family MTD support"
19 This exposes the on-board flash and/or EEPROM as MTD devices
23 bool "Solarflare SFC9000-family hwmon support"
27 This exposes the on-board firmware-managed sensors as a
28 hardware monitor device.
30 bool "Solarflare SFC9000-family SR-IOV support"
35 features, allowing accelerated network performance in
[all …]
Dnet_driver.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2013 Solarflare Communications Inc.
61 /* Checksum generation is a per-queue option in hardware, so each
62 * queue visible to the networking core is backed by two hardware TX
68 #define EFX_TXQ_TYPE_HIGHPRI 4 /* High-priority (for TC) */
70 /* HIGHPRI is Siena-only, and INNER_CSUM is EF10, so no need for both */
86 #define EFX_RX_USR_BUF_SIZE (2048 - 256)
89 * of every buffer. Otherwise, we just need to ensure 4-byte
98 /* Non-standard XDP_PACKET_HEADROOM and tailroom to satisfy XDP_REDIRECT and
[all …]
/Linux-v6.1/lib/xz/
Dxz_crc32.c2 * CRC32 using the polynomial from IEEE-802.3
5 * Igor Pavlov <https://7-zip.org/>
13 * The fastest versions of xz_crc32() on modern CPUs without hardware
14 * accelerated CRC instruction are 3-5 times as fast as this version,
21 * STATIC_RW_DATA is used in the pre-boot environment on some architectures.
41 r = (r >> 1) ^ (poly & ~((r & 1) - 1)); in xz_crc32_init()
55 --size; in xz_crc32()
/Linux-v6.1/drivers/net/ethernet/sfc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
20 tristate "Solarflare SFC9100/EF100-family support"
26 This driver supports 10/40-gigabit Ethernet cards based on
27 the Solarflare SFC9100-family controllers.
29 It also supports 10/25/40/100-gigabit Ethernet cards based
35 bool "Solarflare SFC9100-family MTD support"
39 This exposes the on-board flash and/or EEPROM as MTD devices
43 bool "Solarflare SFC9100-family hwmon support"
47 This exposes the on-board firmware-managed sensors as a
48 hardware monitor device.
[all …]
Dnet_driver.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2013 Solarflare Communications Inc.
61 /* Checksum generation is a per-queue option in hardware, so each
62 * queue visible to the networking core is backed by two hardware TX
68 #define EFX_TXQ_TYPE_HIGHPRI 4 /* High-priority (for TC) */
70 /* HIGHPRI is Siena-only, and INNER_CSUM is EF10, so no need for both */
86 #define EFX_RX_USR_BUF_SIZE (2048 - 256)
89 * of every buffer. Otherwise, we just need to ensure 4-byte
98 /* Non-standard XDP_PACKET_HEADROOM and tailroom to satisfy XDP_REDIRECT and
[all …]
/Linux-v6.1/drivers/soc/tegra/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
4 # 32-bit ARM SoCs
63 # 64-bit ARM SoCs
75 Tegra124's "4+1" Cortex-A15 CPU complex.
85 the Tegra210 has four Cortex-A57 cores paired with four Cortex-A53
88 and providing 256 CUDA cores. It supports hardware-accelerated en-
105 combination of Denver and Cortex-A57 CPU cores and a GPU based on
106 the Pascal architecture. It contains an ADSP with a Cortex-A9 CPU
107 used for audio processing, hardware video encoders/decoders with
108 multi-format support, ISP for image capture processing and BPMP for
/Linux-v6.1/Documentation/gpu/amdgpu/display/
Ddc-glossary.rst7 'Documentation/gpu/amdgpu/amdgpu-glossary.rst'; if you cannot find it anywhere,
16 Accelerated Processing Unit
19 Application-Specific Integrated Circuit
49 Cathode Ray Tube Controller - commonly called "Controller" - Generates
61 DC (Hardware)
108 Display Micro-Controller Unit
111 Display Micro-Controller Unit, version B
225 Transition-Minimized Differential Signaling
/Linux-v6.1/Documentation/scsi/
Dcxgb3i.rst1 .. SPDX-License-Identifier: GPL-2.0
12 (DDP) where the hardware handles the expensive byte touching operations, such
16 - iSCSI PDU digest generation and verification
23 - Direct Data Placement (DDP)
25 S3 h/w can directly place the iSCSI Data-In or Data-Out PDU's
26 payload into pre-posted final destination host-memory buffers based
27 on the Initiator Task Tag (ITT) in Data-In or Target Task Tag (TTT)
28 in Data-Out PDUs.
30 - PDU Transmit and Recovery
41 if possible, will be directly placed into the pre-posted host DDP
[all …]
/Linux-v6.1/Documentation/ABI/testing/
Dsysfs-platform-dfl-port1 What: /sys/bus/platform/devices/dfl-port.0/id
5 Description: Read-only. It returns id of this port. One DFL FPGA device
9 What: /sys/bus/platform/devices/dfl-port.0/afu_id
13 Description: Read-only. User can program different PR bitstreams to FPGA
18 What: /sys/bus/platform/devices/dfl-port.0/power_state
22 Description: Read-only. It reports the APx (AFU Power) state, different APx
24 returns "0" - Normal / "1" - AP1 / "2" - AP2 / "6" - AP6.
26 What: /sys/bus/platform/devices/dfl-port.0/ap1_event
30 Description: Read-write. Read this file for AP1 (AFU Power State 1) event.
34 What: /sys/bus/platform/devices/dfl-port.0/ap2_event
[all …]
/Linux-v6.1/drivers/spi/
Dspi-dw-dma.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
15 #include <linux/platform_data/dma-dw.h>
19 #include "spi-dw.h"
30 if (s->dma_dev != chan->device->dev) in dw_spi_dma_chan_filter()
33 chan->private = s; in dw_spi_dma_chan_filter()
43 def_burst = dws->fifo_len / 2; in dw_spi_dma_maxburst_init()
45 ret = dma_get_slave_caps(dws->rxchan, &caps); in dw_spi_dma_maxburst_init()
51 dws->rxburst = min(max_burst, def_burst); in dw_spi_dma_maxburst_init()
52 dw_writel(dws, DW_SPI_DMARDLR, dws->rxburst - 1); in dw_spi_dma_maxburst_init()
[all …]
/Linux-v6.1/arch/m68k/include/uapi/asm/
Dbootinfo-mac.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 ** asm/bootinfo-mac.h -- Macintosh-specific boot information definitions
11 * Macintosh-specific tags (all __be32)
29 * Macintosh hardware profile data - unused, see macintosh.h for
48 #define BI_MAC_PMU 0x801f /* Mac power management / poweroff hardware */
105 #define MAC_MODEL_Q605_ACC 95 /* Q605 accelerated to 33 MHz */
/Linux-v6.1/Documentation/leds/
Dleds-class.rst8 of the LED (taking a value 0-max_brightness). Most LEDs don't have hardware
9 brightness support so will just be turned on for non-zero brightness settings.
14 existing subsystems with minimal additional code. Examples are the disk-activity,
15 nand-disk and sharpsl-charge triggers. With led triggers disabled, the code
48 - devicename:
51 than to the hardware; the information related to the product and the bus
57 - color:
59 include/dt-bindings/leds/common.h.
61 - function:
63 include/dt-bindings/leds/common.h.
[all …]
/Linux-v6.1/Documentation/fpga/
Ddfl.rst7 - Enno Luebbers <enno.luebbers@intel.com>
8 - Xiao Guangrong <guangrong.xiao@linux.intel.com>
9 - Wu Hao <hao.wu@intel.com>
10 - Xu Yilun <yilun.xu@intel.com>
13 this framework) hides the very details of low layer hardware and provides
25 FPGA Interface Unit (FIU), Accelerated Function Unit (AFU) and Private Features,
29 +----------+ +-->+----------+ +-->+----------+ +-->+----------+
32 +----------+ | | Feature | | | Feature | | | Feature |
33 | Next_DFH |--+ +----------+ | +----------+ | +----------+
34 +----------+ | Next_DFH |--+ | Next_DFH |--+ | Next_DFH |--> NULL
[all …]
/Linux-v6.1/drivers/char/agp/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
7 AGP (Accelerated Graphics Port) is a bus system mainly used to
20 write-combining with MTRR support on the AGP bus. Without it, OpenGL
37 For the ALi-chipset question, ALi suggests you refer to
43 This is a hardware limitation. AGP 1x seems to be fine, though.
60 tristate "AMD Opteron/Athlon64 on-CPU GART support"
64 X using the on-CPU northbridge of the AMD Athlon64/Opteron CPUs.
131 AGP bus adapter on HP PA-RISC machines (Ok, just on the C8000

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