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/Linux-v6.1/Documentation/devicetree/bindings/mtd/
Dgpmi-nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale General-Purpose Media Interface (GPMI) binding
10 - Han Xu <han.xu@nxp.com>
13 The GPMI nand controller provides an interface to control the NAND
14 flash chips. The device tree may optionally contain sub-nodes
21 - enum:
22 - fsl,imx23-gpmi-nand
[all …]
/Linux-v6.1/drivers/mtd/nand/raw/gpmi-nand/
Dgpmi-nand.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Freescale GPMI NAND Flash Driver
5 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
18 #include <linux/dma/mxs-dma.h>
19 #include "gpmi-nand.h"
20 #include "gpmi-regs.h"
21 #include "bch-regs.h"
23 /* Resource names for the GPMI NAND driver. */
24 #define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand"
46 * SFTRST needs 3 GPMI clocks to settle, the reference manual in clear_poll_bit()
[all …]
Dgpmi-nand.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Freescale GPMI NAND Flash Driver
5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
13 #include <linux/dma-mapping.h>
26 * struct bch_geometry - BCH geometry description.
41 * @block_mark_byte_offset: The byte offset in the ECC-based page view at
43 * @block_mark_bit_offset: The bit offset into the ECC-based page view at
65 * struct boot_rom_geometry - Boot ROM geometry description.
92 * struct gpmi_nfc_hardware_timing - GPMI hardware timing parameters.
136 /* NAND Boot issue */
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_MTD_NAND_GPMI_NAND) += gpmi-nand.o
Dbch-regs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Freescale GPMI NAND Flash Driver
5 * Copyright 2008-2011 Freescale Semiconductor, Inc.
/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dimx8mn-bsh-smm-s2.dts1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
9 #include "imx8mn-bsh-smm-s2-common.dtsi"
13 compatible = "bsh,imx8mn-bsh-smm-s2", "fsl,imx8mn";
21 &gpmi {
22 pinctrl-names = "default";
23 pinctrl-0 = <&pinctrl_gpmi_nand>;
24 nand-on-flash-bbt;
29 pinctrl_gpmi_nand: gpmi-nand {
Dimx8mm-ddr4-evk.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
8 #include "imx8mm-evk.dtsi"
12 compatible = "fsl,imx8mm-ddr4-evk", "fsl,imx8mm";
15 pinctrl-0 = <&pinctrl_gpio_led_2>;
23 &gpmi {
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_gpmi_nand>;
26 nand-on-flash-bbt;
31 pinctrl_gpmi_nand: gpmi-nand {
/Linux-v6.1/drivers/mtd/nand/raw/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Raw/Parallel NAND Device Support"
8 NAND flash devices. For further information see
9 <http://www.linux-mtd.infradead.org/doc/nand.html>.
13 comment "Raw/parallel NAND flash controllers"
19 tristate "Denali NAND controller on Intel Moorestown"
23 Enable the driver for NAND flash on Intel Moorestown, using the
24 Denali NAND controller core.
27 tristate "Denali NAND controller as a DT device"
31 Enable the driver for NAND flash on platforms using a Denali NAND
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 obj-$(CONFIG_MTD_RAW_NAND) += nand.o
4 obj-$(CONFIG_MTD_SM_COMMON) += sm_common.o
6 obj-$(CONFIG_MTD_NAND_CAFE) += cafe_nand.o
7 obj-$(CONFIG_MTD_NAND_AMS_DELTA) += ams-delta.o
8 obj-$(CONFIG_MTD_NAND_DENALI) += denali.o
9 obj-$(CONFIG_MTD_NAND_DENALI_PCI) += denali_pci.o
10 obj-$(CONFIG_MTD_NAND_DENALI_DT) += denali_dt.o
11 obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o
12 obj-$(CONFIG_MTD_NAND_S3C2410) += s3c2410.o
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dimx6ulz-bsh-smm-m2.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
13 compatible = "bsh,imx6ulz-bsh-smm-m2", "fsl,imx6ull", "fsl,imx6ulz";
16 stdout-path = &uart4;
19 usdhc2_pwrseq: usdhc2-pwrseq {
20 compatible = "mmc-pwrseq-simple";
21 reset-gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
25 &gpmi {
26 pinctrl-names = "default";
[all …]
Dimx6ull-phytec-tauri-nand.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include "imx6ull-phytec-tauri.dtsi"
11 model = "PHYTEC phyGate-Tauri i.MX6 UltraLite";
12 compatible = "phytec,imx6ull-phygate-tauri",
13 "phytec,imx6ull-phygate-tauri-nand",
14 "phytec,imx6ull-pcl063", "fsl,imx6ull";
17 /* NAND-Version */
18 &gpmi {
Dimx6ull-phytec-segin-lc-rdk-nand.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "imx6ull-phytec-phycore-som.dtsi"
10 #include "imx6ull-phytec-segin.dtsi"
11 #include "imx6ull-phytec-segin-peb-eval-01.dtsi"
12 #include "imx6ull-phytec-segin-peb-wlbt-05.dtsi"
15 model = "PHYTEC phyBOARD-Segin i.MX6 ULL Low Cost with NAND";
16 compatible = "phytec,imx6ull-pbacd10-nand", "phytec,imx6ull-pbacd10",
17 "phytec,imx6ull-pcl063", "fsl,imx6ull";
32 &gpmi {
Dimx6dl-phytec-mira-rdk-nand.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "imx6qdl-phytec-phycore-som.dtsi"
10 #include "imx6qdl-phytec-mira.dtsi"
11 #include "imx6qdl-phytec-mira-peb-eval-01.dtsi"
12 #include "imx6qdl-phytec-mira-peb-av-02.dtsi"
13 #include "imx6qdl-phytec-mira-peb-wlbt-05.dtsi"
16 model = "PHYTEC phyBOARD-Mira DualLite/Solo Carrier-Board with NAND";
17 compatible = "phytec,imx6dl-pbac06-nand", "phytec,imx6dl-pbac06",
18 "phytec,imx6qdl-pcm058", "fsl,imx6dl";
[all …]
Dimx6qp-phytec-mira-rdk-nand.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Author: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
7 /dts-v1/;
9 #include "imx6qdl-phytec-phycore-som.dtsi"
10 #include "imx6qdl-phytec-mira.dtsi"
11 #include "imx6qdl-phytec-mira-peb-eval-01.dtsi"
12 #include "imx6qdl-phytec-mira-peb-av-02.dtsi"
13 #include "imx6qdl-phytec-mira-peb-wlbt-05.dtsi"
16 model = "PHYTEC phyBOARD-Mira QuadPlus Carrier-Board with NAND";
17 compatible = "phytec,imx6qp-pbac06-nand", "phytec,imx6qp-pbac06",
[all …]
Dimx6q-phytec-mira-rdk-nand.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "imx6qdl-phytec-phycore-som.dtsi"
10 #include "imx6qdl-phytec-mira.dtsi"
11 #include "imx6qdl-phytec-mira-peb-eval-01.dtsi"
12 #include "imx6qdl-phytec-mira-peb-av-02.dtsi"
13 #include "imx6qdl-phytec-mira-peb-wlbt-05.dtsi"
16 model = "PHYTEC phyBOARD-Mira Quad Carrier-Board with NAND";
17 compatible = "phytec,imx6q-pbac06-nand", "phytec,imx6q-pbac06",
18 "phytec,imx6qdl-pcm058", "fsl,imx6q";
[all …]
Dimx6ull-phytec-segin-ff-rdk-nand.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "imx6ull-phytec-phycore-som.dtsi"
10 #include "imx6ull-phytec-segin.dtsi"
11 #include "imx6ull-phytec-segin-peb-eval-01.dtsi"
12 #include "imx6ull-phytec-segin-peb-av-02.dtsi"
13 #include "imx6ull-phytec-segin-peb-wlbt-05.dtsi"
16 model = "PHYTEC phyBOARD-Segin i.MX6 ULL Full Featured with NAND";
17 compatible = "phytec,imx6ull-pbacd10-nand", "phytec,imx6ull-pbacd10",
18 "phytec,imx6ull-pcl063", "fsl,imx6ull";
[all …]
Dimx6ul-phytec-segin-ff-rdk-nand.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include "imx6ul-phytec-phycore-som.dtsi"
10 #include "imx6ul-phytec-segin.dtsi"
11 #include "imx6ul-phytec-segin-peb-eval-01.dtsi"
12 #include "imx6ul-phytec-segin-peb-av-02.dtsi"
13 #include "imx6ul-phytec-segin-peb-wlbt-05.dtsi"
16 model = "PHYTEC phyBOARD-Segin i.MX6 UltraLite Full Featured with NAND";
17 compatible = "phytec,imx6ul-pbacd10-nand", "phytec,imx6ul-pbacd10",
18 "phytec,imx6ul-pcl063", "fsl,imx6ul";
[all …]
Dimx23.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 #include "imx23-pinfunc.h"
8 #address-cells = <1>;
9 #size-cells = <1>;
11 interrupt-parent = <&icoll>;
14 * pre-existing /chosen node to be available to insert the
31 #address-cells = <1>;
32 #size-cells = <0>;
35 compatible = "arm,arm926ej-s";
42 compatible = "simple-bus";
[all …]
Dimx7s-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2016-2022 Toradex
7 #include "imx7-colibri.dtsi"
16 /* NAND */
17 &gpmi {
Dimx6ul-isiot-nand.dts1 // SPDX-License-Identifier: GPL-2.0 OR X11
7 /dts-v1/;
9 #include "imx6ul-isiot.dtsi"
12 model = "Engicam Is.IoT MX6UL NAND Starter kit";
13 compatible = "engicam,imx6ul-isiot", "fsl,imx6ul";
16 &gpmi {
Dimx6ull-myir-mys-6ulx-eval.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include "imx6ull-myir-mys-6ulx.dtsi"
12 model = "MYiR i.MX6ULL MYS-6ULX Single Board Computer with NAND";
13 compatible = "myir,imx6ull-mys-6ulx-eval", "fsl,imx6ull";
16 &gpmi {
17 fsl,use-minimum-ecc;
Dimx7d-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2016-2022 Toradex
7 #include "imx7-colibri.dtsi"
23 cpu-supply = <&reg_DCDC2>;
26 /* NAND */
27 &gpmi {
34 vbus-supply = <&reg_usbh_vbus>;
Dimx6q-arm2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
13 compatible = "fsl,imx6q-arm2", "fsl,imx6q";
21 compatible = "simple-bus";
22 #address-cells = <1>;
23 #size-cells = <0>;
26 compatible = "regulator-fixed";
28 regulator-name = "3P3V";
29 regulator-min-microvolt = <3300000>;
[all …]
Dimx28-eukrea-mbmx283lc.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Module contains : i.MX282 + 64MB DDR2 + NAND + Ethernet PHY + RTC
11 /dts-v1/;
12 #include "imx28-eukrea-mbmx28lc.dtsi"
24 &gpmi {
25 pinctrl-names = "default";
26 pinctrl-0 = <&gpmi_pins_a>;
31 pinctrl-names = "default";
32 pinctrl-0 = <&i2c0_pins_a>;
43 phy-mode = "rmii";
[all …]
Dimx6ull-colibri-emmc-nonwifi.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include "imx6ull-colibri.dtsi"
11 mmc1 = &usdhc1; /* MMC 4-bit slot */
21 gpio-line-names = "SODIMM_8",
54 gpio-line-names = "SODIMM_55",
79 gpio-line-names = "SODIMM_56",
111 gpio-line-names = "",
143 gpio-line-names = "SODIMM_43",
157 /* NAND */
158 &gpmi {
[all …]

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