Searched +full:gpio +full:- +full:hog (Results 1 – 25 of 214) sorted by relevance
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/Linux-v6.1/arch/arm/boot/dts/ |
D | nuvoton-npcm750-runbmc-olympus.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 /dts-v1/; 6 #include "nuvoton-npcm750.dtsi" 7 #include "nuvoton-npcm750-runbmc-olympus-pincfg.dtsi" 9 #include <dt-bindings/i2c/i2c.h> 10 #include <dt-bindings/gpio/gpio.h> 43 stdout-path = &serial3; 50 iio-hwmon { 51 compatible = "iio-hwmon"; 52 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, [all …]
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D | aspeed-bmc-lenovo-hr855xg2.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * Copyright (C) 2019-present Lenovo 8 /dts-v1/; 10 #include "aspeed-g5.dtsi" 11 #include <dt-bindings/gpio/aspeed-gpio.h> 15 compatible = "lenovo,hr855xg2-bmc", "aspeed,ast2500"; 29 stdout-path = &uart5; 38 reserved-memory { 39 #address-cells = <1>; 40 #size-cells = <1>; [all …]
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D | aspeed-bmc-opp-palmetto.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 2 /dts-v1/; 4 #include "aspeed-g4.dtsi" 5 #include <dt-bindings/gpio/aspeed-gpio.h> 9 compatible = "tyan,palmetto-bmc", "aspeed,ast2400"; 12 stdout-path = &uart5; 20 reserved-memory { 21 #address-cells = <1>; 22 #size-cells = <1>; 26 no-map; [all …]
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D | aspeed-bmc-lenovo-hr630.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * Copyright (C) 2019-present Lenovo 8 /dts-v1/; 10 #include "aspeed-g5.dtsi" 11 #include <dt-bindings/gpio/aspeed-gpio.h> 15 compatible = "lenovo,hr630-bmc", "aspeed,ast2500"; 29 stdout-path = &uart5; 38 reserved-memory { 39 #address-cells = <1>; 40 #size-cells = <1>; [all …]
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D | armada-388-clearfog.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include "armada-388.dtsi" 9 #include "armada-38x-solidrun-microsom.dtsi" 13 /* So that mvebu u-boot can update the MAC addresses */ 20 stdout-path = "serial0:115200n8"; 23 reg_3p3v: regulator-3p3v { 24 compatible = "regulator-fixed"; 25 regulator-name = "3P3V"; 26 regulator-min-microvolt = <3300000>; 27 regulator-max-microvolt = <3300000>; [all …]
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D | imx7d-colibri-iris-v2.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 6 /dts-v1/; 7 #include "imx7d-colibri.dtsi" 8 #include "imx7-colibri-iris-v2.dtsi" 12 compatible = "toradex,colibri-imx7d-iris-v2", 13 "toradex,colibri-imx7d", 33 lvds-color-map-hog { 34 gpio-hog; 36 line-name = "LVDS_COLOR_MAP"; 37 output-low; [all …]
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D | imx7s-colibri-iris-v2.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 6 /dts-v1/; 7 #include "imx7s-colibri.dtsi" 8 #include "imx7-colibri-iris-v2.dtsi" 12 compatible = "toradex,colibri-imx7s-iris-v2", 13 "toradex,colibri-imx7s", 33 lvds-color-map-hog { 34 gpio-hog; 36 line-name = "LVDS_COLOR_MAP"; 37 output-low; [all …]
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D | imx6q-bx50v3.dtsi | 5 * This file is dual-licensed: you can use it either under the terms 43 #include "imx6q-ba16.dtsi" 46 mclk: clock-mclk { 47 compatible = "fixed-clock"; 48 #clock-cells = <0>; 49 clock-frequency = <22000000>; 52 gpio-poweroff { 53 compatible = "gpio-poweroff"; 58 reg_wl18xx_vmmc: regulator-wl18xx { 59 compatible = "regulator-fixed"; [all …]
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D | aspeed-bmc-opp-lanyang.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 /dts-v1/; 5 #include "aspeed-g5.dtsi" 6 #include <dt-bindings/gpio/aspeed-gpio.h> 10 compatible = "inventec,lanyang-bmc", "aspeed,ast2500"; 13 stdout-path = &uart5; 21 reserved-memory { 22 #address-cells = <1>; 23 #size-cells = <1>; 27 no-map; [all …]
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D | imx6ull-colibri-wifi-iris-v2.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright 2018-2022 Toradex 6 /dts-v1/; 8 #include "imx6ull-colibri-wifi.dtsi" 9 #include "imx6ull-colibri-iris-v2.dtsi" 13 compatible = "toradex,colibri-imx6ull-wifi-iris-v2", 14 "toradex,colibri-imx6ull", 24 lvds-power-on { 25 gpio-hog; 27 line-name = "LVDS_POWER_ON"; [all …]
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D | imx6ull-colibri-iris-v2.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright 2018-2022 Toradex 6 /dts-v1/; 8 #include "imx6ull-colibri-nonwifi.dtsi" 9 #include "imx6ull-colibri-iris-v2.dtsi" 13 compatible = "toradex,colibri-imx6ull-iris-v2", 14 "toradex,colibri-imx6ull", 24 lvds-power-on { 25 gpio-hog; 27 line-name = "LVDS_POWER_ON"; [all …]
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/Linux-v6.1/arch/arm64/boot/dts/mediatek/ |
D | pumpkin-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <dt-bindings/gpio/gpio.h> 16 stdout-path = "serial0:921600n8"; 21 compatible = "linaro,optee-tz"; 26 gpio-keys { 27 compatible = "gpio-keys"; 28 pinctrl-names = "default"; 29 pinctrl-0 = <&gpio_keys_default>; 31 key-volume-up { 35 wakeup-source; [all …]
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/Linux-v6.1/arch/arm64/boot/dts/freescale/ |
D | imx8mp-msc-sm2s-14N0600E.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 /dts-v1/; 7 #include "imx8mp-msc-sm2s.dtsi" 33 gbe0-int-hog { 34 gpio-hog; 39 gbe1-int-hog { 40 gpio-hog; 45 cam2-rst-hog { 46 gpio-hog; 47 output-high; [all …]
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D | imx8mn-var-som-symphony.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright 2019-2020 Variscite Ltd. 7 /dts-v1/; 9 #include "imx8mn-var-som.dtsi" 12 model = "Variscite VAR-SOM-MX8MN Symphony evaluation board"; 13 compatible = "variscite,var-som-mx8mn-symphony", "variscite,var-som-mx8mn", "fsl,imx8mn"; 15 reg_usdhc2_vmmc: regulator-usdhc2-vmmc { 16 compatible = "regulator-fixed"; 17 pinctrl-names = "default"; 18 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; [all …]
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D | imx8mm-var-som-symphony.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "imx8mm-var-som.dtsi" 11 model = "Variscite VAR-SOM-MX8MM Symphony evaluation board"; 12 compatible = "variscite,var-som-mx8mm-symphony", "variscite,var-som-mx8mm", "fsl,imx8mm"; 14 reg_usdhc2_vmmc: regulator-usdhc2-vmmc { 15 compatible = "regulator-fixed"; 16 pinctrl-names = "default"; 17 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; 18 regulator-name = "VSD_3V3"; [all …]
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/Linux-v6.1/Documentation/admin-guide/gpio/ |
D | gpio-sim.rst | 1 .. SPDX-License-Identifier: GPL-2.0-or-later 3 Configfs GPIO Simulator 6 The configfs GPIO Simulator (gpio-sim) provides a way to create simulated GPIO 8 using the standard GPIO character device interface as well as manipulated 12 ------------------------ 14 The gpio-sim module registers a configfs subsystem called ``'gpio-sim'``. For 21 **Group:** ``/config/gpio-sim`` 23 This is the top directory of the gpio-sim configfs tree. 25 **Group:** ``/config/gpio-sim/gpio-device`` 27 **Attribute:** ``/config/gpio-sim/gpio-device/dev_name`` [all …]
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/Linux-v6.1/arch/arm64/boot/dts/renesas/ |
D | ulcb-kf.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 10 * SSI-PCM3168A 11 * aplay -D plughw:0,2 xxx.wav 12 * arecord -D plughw:0,3 xxx.wav 23 #clock-cells = <0>; 24 compatible = "gpio-mux-clock"; 26 select-gpios = <&gpio_exp_75 13 GPIO_ACTIVE_HIGH>; 29 hdmi1-out { 30 compatible = "hdmi-connector"; 35 remote-endpoint = <&adv7513_out>; [all …]
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D | rzg2ul-smarc-pinfunction.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h> 12 pinctrl-0 = <&sound_clk_pins>; 13 pinctrl-names = "default"; 21 can0-stb-hog { 22 gpio-hog; 24 output-low; 25 line-name = "can0_stb"; 35 can1-stb-hog { [all …]
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D | rzg2l-smarc-pinfunction.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h> 12 pinctrl-0 = <&sound_clk_pins>; 13 pinctrl-names = "default"; 20 /* SW7 should be at position 2->3 so that GPIO8_CAN0_STB line is activated */ 21 can0-stb-hog { 22 gpio-hog; 24 output-low; 25 line-name = "can0_stb"; [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/gpio/ |
D | gpio-pca95xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/gpio-pca95xx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP PCA95xx I2C GPIO multiplexer 10 - Krzysztof Kozlowski <krzk@kernel.org> 13 Bindings for the family of I2C GPIO multiplexers/expanders: NXP PCA95xx, 19 - items: 20 - const: diodes,pi4ioe5v6534q 21 - const: nxp,pcal6534 [all …]
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D | fairchild,74hc595.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/fairchild,74hc595.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic 8-bit shift register 10 - Maxime Ripard <mripard@kernel.org> 15 - fairchild,74hc595 16 - nxp,74lvc594 21 gpio-controller: true 23 '#gpio-cells': [all …]
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D | fsl-imx-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/gpio/fsl-imx-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX/MXC GPIO controller 10 - Anson Huang <Anson.Huang@nxp.com> 15 - enum: 16 - fsl,imx1-gpio 17 - fsl,imx21-gpio 18 - fsl,imx31-gpio [all …]
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D | ti,omap-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/ti,omap-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: OMAP GPIO controller bindings 10 - Grygorii Strashko <grygorii.strashko@ti.com> 13 The general-purpose interface combines general-purpose input/output (GPIO) banks. 14 Each GPIO banks provides up to 32 dedicated general-purpose pins with input 15 and output capabilities; interrupt generation in active mode and wake-up 21 - enum: [all …]
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/Linux-v6.1/drivers/gpio/ |
D | gpio-sim.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * GPIO testing driver based on configfs. 14 #include <linux/gpio/driver.h> 15 #include <linux/gpio/machine.h> 67 gc = &chip->gc; in gpio_sim_apply_pull() 68 desc = &gc->gpiodev->descs[offset]; in gpio_sim_apply_pull() 70 mutex_lock(&chip->lock); in gpio_sim_apply_pull() 72 if (test_bit(FLAG_REQUESTED, &desc->flags) && in gpio_sim_apply_pull() 73 !test_bit(FLAG_IS_OUT, &desc->flags)) { in gpio_sim_apply_pull() 74 if (value == !!test_bit(offset, chip->value_map)) in gpio_sim_apply_pull() [all …]
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D | gpiolib-of.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * OF helpers for the GPIO API 5 * Copyright (c) 2007-2008 MontaVista Software, Inc. 15 #include <linux/gpio/consumer.h> 21 #include <linux/gpio/machine.h> 24 #include "gpiolib-of.h" 27 * of_gpio_spi_cs_get_count() - special GPIO counting for SPI 29 * @con_id: Function within the GPIO consumer 31 * Some elder GPIO controllers need special quirks. Currently we handle 32 * the Freescale and PPC GPIO controller with bindings that doesn't use the [all …]
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