Searched +full:gmu +full:- +full:sram (Results 1 – 3 of 3) sorted by relevance
| /Linux-v5.10/Documentation/devicetree/bindings/display/msm/ |
| D | gpu.txt | 4 - compatible: "qcom,adreno-XYZ.W", "qcom,adreno" or
5 "amd,imageon-XYZ.W", "amd,imageon"
6 for example: "qcom,adreno-306.0", "qcom,adreno"
9 with the chip-id.
11 - reg: Physical base address and length of the controller's registers.
12 - interrupts: The interrupt signal from the gpu.
13 - clocks: device clocks (if applicable)
14 See ../clocks/clock-bindings.txt for details.
15 - clock-names: the following clocks are required by a3xx, a4xx and a5xx
20 For GMU attached devices the GPU clocks are not used and are not required. The
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| /Linux-v5.10/Documentation/devicetree/bindings/sram/ |
| D | qcom,ocmem.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sram/qcom,ocmem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Masney <masneyb@onstation.org>
18 const: qcom,msm8974-ocmem
22 - description: Control registers
23 - description: OCMEM address range
25 reg-names:
27 - const: ctrl
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| /Linux-v5.10/arch/arm/boot/dts/ |
| D | qcom-msm8974.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
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