Searched +full:gcc +full:- +full:sm8350 (Results 1 – 12 of 12) sorted by relevance
/Linux-v5.15/Documentation/devicetree/bindings/clock/ |
D | qcom,gcc-sm8350.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8350.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controller Binding for SM8350 10 - Vinod Koul <vkoul@kernel.org> 14 power domains on SM8350. 17 - dt-bindings/clock/qcom,gcc-sm8350.h 21 const: qcom,gcc-sm8350 25 - description: Board XO source [all …]
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D | qcom,rpmhcc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Taniya Das <tdas@codeaurora.org> 20 - qcom,sc7180-rpmh-clk 21 - qcom,sc7280-rpmh-clk 22 - qcom,sc8180x-rpmh-clk 23 - qcom,sdm845-rpmh-clk 24 - qcom,sdx55-rpmh-clk 25 - qcom,sm6350-rpmh-clk [all …]
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/Linux-v5.15/arch/arm64/boot/dts/qcom/ |
D | sm8350.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,gcc-sm8350.h> 8 #include <dt-bindings/clock/qcom,rpmh.h> 9 #include <dt-bindings/interconnect/qcom,sm8350.h> 10 #include <dt-bindings/mailbox/qcom-ipcc.h> 11 #include <dt-bindings/power/qcom-aoss-qmp.h> 12 #include <dt-bindings/power/qcom-rpmpd.h> 13 #include <dt-bindings/soc/qcom,rpmh-rsc.h> 14 #include <dt-bindings/thermal/thermal.h> [all …]
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/Linux-v5.15/Documentation/devicetree/bindings/phy/ |
D | qcom,qmp-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 11 - Manu Gautam <mgautam@codeaurora.org> 20 - qcom,ipq6018-qmp-pcie-phy 21 - qcom,ipq6018-qmp-usb3-phy 22 - qcom,ipq8074-qmp-pcie-phy 23 - qcom,ipq8074-qmp-usb3-phy 24 - qcom,msm8996-qmp-pcie-phy [all …]
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D | qcom,usb-snps-femto-v2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: "http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml#" 5 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 title: Qualcomm Synopsys Femto High-Speed USB PHY V2 10 - Wesley Cheng <wcheng@codeaurora.org> 13 Qualcomm High-Speed USB PHY 18 - qcom,usb-snps-hs-7nm-phy 19 - qcom,sc7280-usb-hs-phy 20 - qcom,sm8150-usb-hs-phy [all …]
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/Linux-v5.15/Documentation/devicetree/bindings/firmware/ |
D | qcom,scm.txt | 9 - compatible: must contain one of the following: 10 * "qcom,scm-apq8064" 11 * "qcom,scm-apq8084" 12 * "qcom,scm-ipq4019" 13 * "qcom,scm-ipq806x" 14 * "qcom,scm-ipq8074" 15 * "qcom,scm-mdm9607" 16 * "qcom,scm-msm8660" 17 * "qcom,scm-msm8916" 18 * "qcom,scm-msm8960" [all …]
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/Linux-v5.15/Documentation/devicetree/bindings/usb/ |
D | qcom,dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Manu Gautam <mgautam@codeaurora.org> 15 - enum: 16 - qcom,msm8996-dwc3 17 - qcom,msm8998-dwc3 18 - qcom,sc7180-dwc3 19 - qcom,sc7280-dwc3 20 - qcom,sdm660-dwc3 [all …]
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/Linux-v5.15/drivers/clk/qcom/ |
D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o 4 clk-qcom-y += common.o 5 clk-qcom-y += clk-regmap.o 6 clk-qcom-y += clk-alpha-pll.o 7 clk-qcom-y += clk-pll.o 8 clk-qcom-y += clk-rcg.o 9 clk-qcom-y += clk-rcg2.o 10 clk-qcom-y += clk-branch.o 11 clk-qcom-y += clk-regmap-divider.o [all …]
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D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 589 tristate "SM8350 Global Clock Controller" 592 Support for the global clock controller on SM8350 devices. 640 tristate "High-Frequency PLL (HFPLL) Clock Controller" 642 Support for the high-frequency PLLs present on Qualcomm devices. 649 Support for the Krait ACC and GCC clock controllers. Say Y
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D | gcc-sm8350.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2020-2021, Linaro Limited 11 #include <dt-bindings/clock/qcom,gcc-sm8350.h> 13 #include "clk-alpha-pll.h" 14 #include "clk-branch.h" 15 #include "clk-rcg.h" 16 #include "clk-regmap.h" 17 #include "clk-regmap-divider.h" 18 #include "clk-regmap-mux.h" [all …]
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/Linux-v5.15/Documentation/devicetree/bindings/thermal/ |
D | qcom-tsens.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 --- 5 $id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Amit Kucheria <amitk@kernel.org> 22 - description: msm9860 TSENS based 24 - enum: 25 - qcom,ipq8064-tsens 27 - description: v0.1 of TSENS 29 - enum: [all …]
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/Linux-v5.15/drivers/phy/qualcomm/ |
D | phy-qcom-qmp.c | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <linux/clk-provider.h> 23 #include <dt-bindings/phy/phy.h> 25 #include "phy-qcom-qmp.h" 84 * if yes, then offset gives index in the reg-layout 116 /* set of registers with offsets different per-PHY */ 2766 /* struct qmp_phy_cfg - per-PHY initialization config */ 2768 /* phy-type - PCIE/UFS/USB */ 2773 /* Init sequence for PHY blocks - serdes, tx, rx, pcs */ 2855 * struct qmp_phy - per-lane phy descriptor [all …]
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