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/Linux-v5.15/Documentation/devicetree/bindings/clock/
Dqcom,gcc-sm6350.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm6350.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller Binding for SM6350
10 - Konrad Dybcio <konrad.dybcio@somainline.org>
14 power domains on SM6350.
17 - dt-bindings/clock/qcom,gcc-sm6350.h
21 const: qcom,gcc-sm6350
25 - description: Board XO source
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Dqcom,rpmhcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <tdas@codeaurora.org>
20 - qcom,sc7180-rpmh-clk
21 - qcom,sc7280-rpmh-clk
22 - qcom,sc8180x-rpmh-clk
23 - qcom,sdm845-rpmh-clk
24 - qcom,sdx55-rpmh-clk
25 - qcom,sm6350-rpmh-clk
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/Linux-v5.15/drivers/clk/qcom/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
4 clk-qcom-y += common.o
5 clk-qcom-y += clk-regmap.o
6 clk-qcom-y += clk-alpha-pll.o
7 clk-qcom-y += clk-pll.o
8 clk-qcom-y += clk-rcg.o
9 clk-qcom-y += clk-rcg2.o
10 clk-qcom-y += clk-branch.o
11 clk-qcom-y += clk-regmap-divider.o
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
566 tristate "SM6350 Global Clock Controller"
569 Support for the global clock controller on SM6350 devices.
640 tristate "High-Frequency PLL (HFPLL) Clock Controller"
642 Support for the high-frequency PLLs present on Qualcomm devices.
649 Support for the Krait ACC and GCC clock controllers. Say Y
Dgcc-sm6350.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <dt-bindings/clock/qcom,gcc-sm6350.h>
13 #include "clk-alpha-pll.h"
14 #include "clk-branch.h"
15 #include "clk-rcg.h"
16 #include "clk-regmap.h"
17 #include "clk-regmap-divider.h"
18 #include "clk-regmap-mux.h"
2537 { .compatible = "qcom,gcc-sm6350" },
2566 .name = "gcc-sm6350",
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