| /Linux-v5.15/Documentation/devicetree/bindings/clock/ |
| D | mvebu-gated-clock.txt | 7 corresponding clock gating control bit in HW to ease manual clock
177 "marvell,armada-370-gating-clock" - for Armada 370 SoC clock gating
178 "marvell,armada-375-gating-clock" - for Armada 375 SoC clock gating
179 "marvell,armada-380-gating-clock" - for Armada 380/385 SoC clock gating
180 "marvell,armada-390-gating-clock" - for Armada 39x SoC clock gating
181 "marvell,armada-xp-gating-clock" - for Armada XP SoC clock gating
182 "marvell,mv98dx3236-gating-clock" - for 98dx3236 SoC clock gating
183 "marvell,dove-gating-clock" - for Dove SoC clock gating
184 "marvell,kirkwood-gating-clock" - for Kirkwood SoC clock gating
185 - reg : shall be the register address of the Clock Gating Control register
[all …]
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| D | imx8qxp-lpcg.yaml | 7 title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock bindings
17 This level of clock gating is provided after the clocks are generated
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| /Linux-v5.15/drivers/clk/qcom/ |
| D | clk-branch.h | 12 * struct clk_branch - gating clock with status bit and dynamic hardware gating
14 * @hwcg_reg: dynamic hardware clock gating register
15 * @hwcg_bit: ORed with @hwcg_reg to enable dynamic hardware clock gating
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| /Linux-v5.15/drivers/gpu/drm/i915/gt/ |
| D | intel_sseu.c | 178 /* TGL only supports slice-level power gating */ in gen12_sseu_info_init()
204 /* ICL has no power gating restrictions. */ in gen11_sseu_info_init()
256 * CHV supports subslice power gating on devices with more than in cherryview_sseu_info_init()
257 * one subslice, and supports EU power gating on devices with in cherryview_sseu_info_init()
342 * SKL+ supports slice power gating on devices with more than in gen9_sseu_info_init()
343 * one slice, and supports EU power gating on devices with in gen9_sseu_info_init()
345 * power gating on devices with more than one subslice, and in gen9_sseu_info_init()
346 * supports EU power gating on devices with more than one EU in gen9_sseu_info_init()
449 * BDW supports slice power gating on devices with more than in bdw_sseu_info_init()
604 * Starting in Gen9, render power gating can leave in intel_sseu_make_rpcs()
[all …]
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| /Linux-v5.15/sound/soc/intel/catpt/ |
| D | dsp.c | 159 /* wait for SRAM power gating to propagate */ in catpt_dsp_set_srampge()
197 /* disable core clock gating */ in catpt_dsp_update_srampge()
202 /* enable core clock gating */ in catpt_dsp_update_srampge()
351 /* disable core clock gating */ in catpt_dsp_power_down()
364 /* switch clock gating */ in catpt_dsp_power_down()
372 /* SRAM power gating all */ in catpt_dsp_power_down()
384 /* enable core clock gating */ in catpt_dsp_power_down()
396 /* disable core clock gating */ in catpt_dsp_power_up()
399 /* switch clock gating */ in catpt_dsp_power_up()
406 /* SRAM power gating none */ in catpt_dsp_power_up()
[all …]
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| /Linux-v5.15/drivers/soc/tegra/ |
| D | flowctrl.c | 84 /* pwr gating on wfe */ in flowctrl_cpu_suspend_enter()
99 * power-gating (like memory running off PLLP), in flowctrl_cpu_suspend_enter()
103 * while wfe for the power-gating, just like it in flowctrl_cpu_suspend_enter()
108 /* pwr gating on wfi */ in flowctrl_cpu_suspend_enter()
115 reg |= FLOW_CTRL_CSR_ENABLE; /* pwr gating */ in flowctrl_cpu_suspend_enter()
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| /Linux-v5.15/drivers/clk/bcm/ |
| D | clk-kona.h | 106 * Gating control and status is managed by a 32-bit gate register.
108 * There are several types of gating available:
111 * - hardware-only gating (auto-gating)
116 * - software-only gating
117 * Auto-gating is not available for this type of clock.
121 * To ensure a change to the gating status is complete, the
124 * - selectable hardware or software gating
125 * Gating for this type of clock can be configured to be either
133 u32 hw_sw_sel_bit; /* 0: hardware gating; 1: software gating */
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| /Linux-v5.15/arch/arm/mach-ux500/ |
| D | pm_domains.c | 21 * Handle the gating of the PM domain regulator here. in pd_power_off()
25 * callbacks, to be able to enable PM domain gating/ungating. in pd_power_off()
37 * callbacks, to be able to enable PM domain gating/ungating. in pd_power_on()
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| /Linux-v5.15/drivers/platform/x86/intel/pmc/ |
| D | Kconfig | 20 - PCH IP Power Gating status
22 - MPHY/PLL gating status (Sunrisepoint PCH only)
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| /Linux-v5.15/drivers/gpu/drm/amd/pm/inc/ |
| D | hardwaremanager.h | 95 …PHM_PlatformCaps_DisableMGClockGating, /* to disable Medium Grain Clock Gating or…
96 …PHM_PlatformCaps_DisableMGCGTSSM, /* TO disable Medium Grain Clock Gating Sh…
98 PHM_PlatformCaps_DisablePowerGating, /* to disable power gating */
148 …PHM_PlatformCaps_UVDPowerGating, /* enable UVD power gating, supported from…
149 …PHM_PlatformCaps_UVDDynamicPowerGating, /* enable UVD Dynamic power gating, suppor…
150 …PHM_PlatformCaps_VCEPowerGating, /* Enable VCE power gating, supported for …
151 …PHM_PlatformCaps_SamuPowerGating, /* Enable SAMU power gating, supported for…
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| /Linux-v5.15/drivers/gpu/drm/gma500/ |
| D | psb_device.c | 154 u32 gating = PSB_RSGX32(PSB_CR_CLKGATECTL); in psb_init_pm() local
155 gating &= ~3; /* Disable 2D clock gating */ in psb_init_pm()
156 gating |= 1; in psb_init_pm()
157 PSB_WSGX32(gating, PSB_CR_CLKGATECTL); in psb_init_pm()
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| /Linux-v5.15/sound/pci/hda/ |
| D | hda_jack.c | 196 /* A gating jack indicates the jack is invalid if gating is unplugged */ in jack_detect_update()
365 * snd_hda_jack_set_gating_jack - Set gating jack.
368 * @gating_nid: gating pin NID
370 * Indicates the gated jack is only valid when the gating jack is plugged.
376 struct hda_jack_tbl *gating = in snd_hda_jack_set_gating_jack() local
381 if (!gated || !gating) in snd_hda_jack_set_gating_jack()
385 gating->gated_jack = gated_nid; in snd_hda_jack_set_gating_jack()
470 * to make sure that all gating jacks properly have been set in snd_hda_jack_report_sync()
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| /Linux-v5.15/sound/soc/sof/intel/ |
| D | hda-ipc.h | 43 /* Prevent clock gating (0 - cg allowed, 1 - DSP clock always on) */
45 /* Prevent power gating (0 - deep power state transitions allowed) */
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| D | hda-loader.c | 454 /* disable clock gating and power gating */ in hda_dsp_pre_fw_run()
474 /* re-enable clock gating and power gating */ in hda_dsp_post_fw_run()
514 /* re-enable clock gating and power gating */ in hda_dsp_post_fw_run_icl()
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| D | hda-ctrl.c | 161 * enable/disable audio dsp clock gating and power gating bits.
169 /* enable/disable audio dsp clock gating */ in hda_dsp_ctrl_clock_power_gating()
178 /* enable/disable audio dsp power gating */ in hda_dsp_ctrl_clock_power_gating()
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| /Linux-v5.15/drivers/media/dvb-frontends/ |
| D | dib3000mc.h | 48 int gating);
69 int gating) in dib3000mc_get_tuner_i2c_master() argument
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| D | dib9000.h | 35 …pter *dib9000_get_i2c_master(struct dvb_frontend *fe, enum dibx000_i2c_interface intf, int gating);
52 …apter *dib9000_get_i2c_master(struct dvb_frontend *fe, enum dibx000_i2c_interface intf, int gating) in dib9000_get_i2c_master() argument
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| /Linux-v5.15/drivers/misc/mei/ |
| D | mei_dev.h | 301 * @pg_state : power gating state of the device
303 * @pg_is_enabled : is power gating enabled
370 * enum mei_pg_event - power gating transition events
372 * @MEI_PG_EVENT_IDLE: the driver is not in power gating transition
387 * enum mei_pg_state - device internal power gating state
448 * @pg_event : power gating event
530 * Power Gating support
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_vm_helper.c | 45 /* Pre-init system aperture start/end for all HUBP instances (if not gating?) in dc_setup_system_context()
46 * or cache system aperture if using power gating in dc_setup_system_context()
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| /Linux-v5.15/Documentation/devicetree/bindings/power/ |
| D | fsl,imx-gpc.yaml | 14 counters and Power Gating Control (PGC).
18 described as subnodes of the power gating controller 'pgc' node of the GPC.
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| D | fsl,imx-gpcv2.yaml | 13 The i.MX7S/D General Power Control (GPC) block contains Power Gating
19 described as subnodes of the power gating controller 'pgc' node.
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| /Linux-v5.15/drivers/scsi/ufs/ |
| D | ufshcd.h | 361 /* clock gating state */
370 * struct ufs_clk_gating - UFS clock gating related info
376 * @delay_ms: gating delay in ms
377 * @is_suspended: clk gating is suspended when set to 1 which can be used
380 * @enable_attr: sysfs attribute to enable/disable clock gating
381 * @is_enabled: Indicates the current status of clock gating
382 * @is_initialized: Indicates whether clock gating is initialized or not
384 * completion before gating clocks.
594 /* Allow dynamic clk gating */
597 /* Allow hiberb8 with clk gating */
[all …]
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| /Linux-v5.15/arch/arm/mach-socfpga/ |
| D | self-refresh.S | 48 /* Enable dynamic clock gating in the Power Control Register. */
115 /* Disable dynamic clock gating in the Power Control Register. */
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| /Linux-v5.15/drivers/media/platform/s5p-mfc/ |
| D | s5p_mfc_pm.c | 96 /* prepare for software clock gating */ in s5p_mfc_power_on()
111 /* finish software clock gating */ in s5p_mfc_power_off()
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| /Linux-v5.15/arch/mips/kernel/ |
| D | pm-cps.c | 143 /* Power gating relies upon CPS SMP */ in cps_pm_enter_state()
377 /* Power gating relies upon CPS SMP */ in cps_gen_entry_code()
718 /* Detect whether clock gating is implemented */ in cps_pm_init()
722 pr_warn("pm-cps: CPC does not support clock gating\n"); in cps_pm_init()
724 /* Power gating is available with CPS SMP & any CPC */ in cps_pm_init()
728 pr_warn("pm-cps: CPS SMP not in use, power gating unavailable\n"); in cps_pm_init()
730 pr_warn("pm-cps: no CPC, clock & power gating unavailable\n"); in cps_pm_init()
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