Home
last modified time | relevance | path

Searched +full:g +full:- +full:tx +full:- +full:fifo +full:- +full:size (Results 1 – 25 of 222) sorted by relevance

123456789

/Linux-v5.10/arch/arm/boot/dts/
Dbcm283x-rpi-usb-otg.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 g-rx-fifo-size = <256>;
5 g-np-tx-fifo-size = <32>;
8 * fifo sizes shouldn't exceed 3776 bytes.
10 g-tx-fifo-size = <256 256 512 512 512 768 768>;
Dbcm283x-rpi-usb-peripheral.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 g-rx-fifo-size = <256>;
5 g-np-tx-fifo-size = <32>;
6 g-tx-fifo-size = <256 256 512 512 512 768 768>;
Drk3xxx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/soc/rockchip,boot-mode.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
15 interrupt-parent = <&gic>;
36 compatible = "simple-bus";
37 #address-cells = <1>;
38 #size-cells = <1>;
[all …]
Dmeson.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&gic>;
15 compatible = "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
21 compatible = "simple-bus";
[all …]
Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
8 #include <dt-bindings/soc/rockchip,boot-mode.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
16 interrupt-parent = <&gic>;
[all …]
Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/usb/
Ddwc2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
15 - const: brcm,bcm2835-usb
16 - const: hisilicon,hi6220-usb
17 - items:
18 - const: rockchip,rk3066-usb
19 - const: snps,dwc2
20 - items:
[all …]
Damlogic,meson-g12a-usb-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Neil Armstrong <narmstrong@baylibre.com>
15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode
20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP.
26 host-only mode.
33 - amlogic,meson-gxl-usb-ctrl
34 - amlogic,meson-gxm-usb-ctrl
[all …]
/Linux-v5.10/drivers/net/ethernet/sun/
Dcassini.h1 /* SPDX-License-Identifier: GPL-2.0+ */
29 /* cassini register map: 2M memory mapped in 32-bit memory space accessible as
30 * 32-bit words. there is no i/o port access. REG_ addresses are
41 /* this register sets the weights for the weighted round robin arbiter. e.g.,
42 * if rx weight == 1 and tx weight == 0, rx == 2x tx transfer credit
45 * DEFAULT: 0x0, SIZE: 5 bits
54 /* if enabled, BIM can send bursts across PCI bus > cacheline size. burst
57 * DEFAULT: 0x0, SIZE: 1 bit
62 /* top level interrupts [0-9] are auto-cleared to 0 when the status
63 * register is read. second level interrupts [13 - 18] are cleared at
[all …]
/Linux-v5.10/drivers/net/wireless/intel/iwlegacy/
Dprph.h8 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
106 * processor is sleeping (e.g. for periodic power-saving shutdowns of radio).
119 * The uCode used for open-source drivers includes two programs:
121 * 1) Initialization -- performs hardware calibration and sets up some
128 * 2) Runtime/Protocol -- performs all normal runtime operations. This
170 * Data caching during power-downs:
172 * Just before the embedded controller powers down (e.g for automatic
173 * power-saving modes, or for RFKILL), uCode stores (via PCI busmaster DMA)
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/net/
Dintel,dwmac-plat.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
17 - intel,keembay-dwmac
19 - compatible
22 - $ref: "snps,dwmac.yaml#"
27 - items:
28 - enum:
[all …]
/Linux-v5.10/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
Dmain.h35 #define NTXRATE 64 /* # tx MPDUs rate is reported for */
48 * Usage example, e.g. a three-bit field (bits 4-6):
52 * regval = R_REG(osh, &regs->regfoo);
55 * W_REG(osh, &regs->regfoo, regval);
58 (((unsigned)1 << (width)) - 1)
67 /* max # supported core revisions (0 .. MAXCOREREV - 1) */
76 #define BRCMS_SHORTSLOT_AUTO -1 /* Driver will manage Shortslot setting */
91 #define TXFID_QUEUE_MASK 0x0007 /* Bits 0-2 */
92 #define TXFID_SEQ_MASK 0x7FE0 /* Bits 5-15 */
130 #define NFIFO 6 /* # tx/rx fifopairs */
[all …]
Dd11.h26 /* RX FIFO numbers */
28 #define RX_TXSTATUS_FIFO 3 /* RX fifo for tx status packages */
30 /* TX FIFO numbers using WME Access Category */
31 #define TX_AC_BK_FIFO 0 /* Background TX FIFO */
32 #define TX_AC_BE_FIFO 1 /* Best-Effort TX FIFO */
33 #define TX_AC_VI_FIFO 2 /* Video TX FIFO */
34 #define TX_AC_VO_FIFO 3 /* Voice TX FIFO */
35 #define TX_BCMC_FIFO 4 /* Broadcast/Multicast TX FIFO */
36 #define TX_ATIM_FIFO 5 /* TX fifo for ATIM window info */
40 /* Per AC TX limit settings */
[all …]
/Linux-v5.10/drivers/usb/mtu3/
Dmtu3.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * mtu3.h - MediaTek USB3 DRD header
32 #define MU3D_EP_TXCR0(epnum) (U3D_TX1CSR0 + (((epnum) - 1) * 0x10))
33 #define MU3D_EP_TXCR1(epnum) (U3D_TX1CSR1 + (((epnum) - 1) * 0x10))
34 #define MU3D_EP_TXCR2(epnum) (U3D_TX1CSR2 + (((epnum) - 1) * 0x10))
36 #define MU3D_EP_RXCR0(epnum) (U3D_RX1CSR0 + (((epnum) - 1) * 0x10))
37 #define MU3D_EP_RXCR1(epnum) (U3D_RX1CSR1 + (((epnum) - 1) * 0x10))
38 #define MU3D_EP_RXCR2(epnum) (U3D_RX1CSR2 + (((epnum) - 1) * 0x10))
40 #define USB_QMU_TQHIAR(epnum) (U3D_TXQHIAR1 + (((epnum) - 1) * 0x4))
41 #define USB_QMU_RQHIAR(epnum) (U3D_RXQHIAR1 + (((epnum) - 1) * 0x4))
[all …]
Dmtu3_core.c1 // SPDX-License-Identifier: GPL-2.0
3 * mtu3_core.c - hardware access layer and gadget init/exit of
4 * MediaTek usb3 Dual-Role Controller Driver
11 #include <linux/dma-mapping.h>
25 struct mtu3_fifo_info *fifo = mep->fifo; in ep_fifo_alloc() local
29 /* ensure that @mep->fifo_seg_size is power of two */ in ep_fifo_alloc()
31 if (num_bits > fifo->limit) in ep_fifo_alloc()
32 return -EINVAL; in ep_fifo_alloc()
34 mep->fifo_seg_size = num_bits * MTU3_EP_FIFO_UNIT; in ep_fifo_alloc()
35 num_bits = num_bits * (mep->slot + 1); in ep_fifo_alloc()
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/serial/
D8250.yaml3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - devicetree@vger.kernel.org
13 - $ref: /schemas/serial.yaml#
14 - if:
16 - aspeed,sirq-polarity-sense
20 const: aspeed,ast2500-vuart
21 - if:
24 const: mrvl,mmp-uart
27 reg-shift:
[all …]
/Linux-v5.10/drivers/usb/musb/
Dmusb_gadget.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2005-2006 by Texas Instruments
7 * Copyright (C) 2006-2007 Nokia Corporation
18 #include <linux/dma-mapping.h>
25 /* ----------------------------------------------------------------------- */
28 (req->map_state != UN_MAPPED))
36 struct dma_controller *dma = musb->dma_controller; in map_dma_buffer()
38 request->map_state = UN_MAPPED; in map_dma_buffer()
40 if (!is_dma_capable() || !musb_ep->dma) in map_dma_buffer()
47 if (dma->is_compatible) in map_dma_buffer()
[all …]
/Linux-v5.10/drivers/net/wireless/broadcom/b43/
Db43.h1 /* SPDX-License-Identifier: GPL-2.0 */
61 /* 32-bit DMA */
68 /* 64-bit DMA */
203 #define B43_BFL2_APLL_WAR 0x0002 /* alternative A-band PLL settings implemented */
204 #define B43_BFL2_TXPWRCTRL_EN 0x0004 /* permits enabling TX Power Control */
206 #define B43_BFL2_5G_PWRGAIN 0x0010 /* supports 5G band power gain */
209 #define B43_BFL2_BTC3WIRE 0x0080 /* used 3-wire bluetooth coexist */
211 #define B43_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */
212 #define B43_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */
234 #define B43_SHM_AUTOINC_R 0x0200 /* Auto-increment address on read */
[all …]
/Linux-v5.10/drivers/usb/dwc2/
Dparams.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2004-2016 Synopsys, Inc.
14 * 3. The names of the above-listed copyright holders may not be used
44 struct dwc2_core_params *p = &hsotg->params; in dwc2_set_bcm_params()
46 p->host_rx_fifo_size = 774; in dwc2_set_bcm_params()
47 p->max_transfer_size = 65535; in dwc2_set_bcm_params()
48 p->max_packet_count = 511; in dwc2_set_bcm_params()
49 p->ahbcfg = 0x10; in dwc2_set_bcm_params()
54 struct dwc2_core_params *p = &hsotg->params; in dwc2_set_his_params()
56 p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE; in dwc2_set_his_params()
[all …]
/Linux-v5.10/drivers/staging/rtl8723bs/include/
Dhal_data.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
16 /* <Roger_Notes> For RTL8723 WiFi/BT/GPS multi-function configuration. 2010.10.06. */
56 /* Tx Power Limit Table Size */
115 u8 DynamicTxHighPowerLvl;/* Add by Jacken Tx Power Control for Near/Far Range 2008/03/06 */
117 /* for tx power tracking */
173 …/* Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. …
180 enum RT_MULTI_FUNC MultiFunc; /* For multi-function consideration. */
192 enum BAND_TYPE CurrentBandType; /* 0:2.4G, 1:5G */
196 u8 nCur40MhzPrimeSC;/* Control channel sub-carrier */
[all …]
/Linux-v5.10/drivers/net/ethernet/chelsio/cxgb/
Dvsc7326_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Straight off the data sheet, VMDS-10038 Rev 2.0 and
9 * PD0011-01-14-Meigs-II 2002-12-12
67 /* FIFO registers
69 * fn = FIFO number, 0-9
72 #define REG_TOP_BOTTOM(ie,fn) CRA(0x2,ie&1,0x10+fn) /* FIFO Buffer Top & Bottom */
73 #define REG_TAIL(ie,fn) CRA(0x2,ie&1,0x20+fn) /* FIFO Write Pointer */
74 #define REG_HEAD(ie,fn) CRA(0x2,ie&1,0x30+fn) /* FIFO Read Pointer */
84 * bn = bucket number 0-10 (yes, 11 buckets)
90 #define REG_SRAM_ADR(ie) CRA(0x2,ie&1,0x0e) /* FIFO SRAM address */
[all …]
/Linux-v5.10/drivers/net/ethernet/freescale/fman/
Dfman_memac.c2 * Copyright 2008-2015 Freescale Semiconductor Inc.
81 #define CMD_CFG_TX_LOWP_ENA 0x00800000 /* 08 Tx Low Power Idle Enable */
85 #define CMD_CFG_TX_PAD_EN 0x00000800 /* 20 Enable Tx padding of frames */
93 /* Transmit FIFO Sections Register (TX_FIFO_SECTIONS) */
112 #define IF_MODE_MASK 0x00000003 /* 30-31 Mask on i/f mode bits */
113 #define IF_MODE_10G 0x00000000 /* 30-31 10G interface */
114 #define IF_MODE_GMII 0x00000002 /* 30-31 GMII (1G) interface */
117 #define IF_MODE_RGMII_1000 0x00004000 /* 10 - 1000Mbps RGMII */
118 #define IF_MODE_RGMII_100 0x00000000 /* 00 - 100Mbps RGMII */
119 #define IF_MODE_RGMII_10 0x00002000 /* 01 - 10Mbps RGMII */
[all …]
/Linux-v5.10/drivers/scsi/csiostor/
Dcsio_hw.c4 * Copyright (c) 2008-2012 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
64 {"T580-Dbg 10G", "Chelsio T580-Dbg 10G [FCoE]"},
65 {"T520-CR 10G", "Chelsio T520-CR 10G [FCoE]"},
66 {"T522-CR 10G/1G", "Chelsio T522-CR 10G/1G [FCoE]"},
67 {"T540-CR 10G", "Chelsio T540-CR 10G [FCoE]"},
68 {"T520-BCH 10G", "Chelsio T520-BCH 10G [FCoE]"},
69 {"T540-BCH 10G", "Chelsio T540-BCH 10G [FCoE]"},
70 {"T540-CH 10G", "Chelsio T540-CH 10G [FCoE]"},
[all …]
/Linux-v5.10/drivers/net/ethernet/tehuti/
Dtehuti.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * 1) RX Free Fifo - RXF - holds descriptors of empty buffers to accept incoming
13 * traffic. This Fifo is filled by SW and is readen by HW. Each descriptor holds
14 * info about buffer's location, size and ID. An ID field is used to identify a
15 * buffer when it's returned with data via RXD Fifo (see below)
16 * 2) RX Data Fifo - RXD - holds descriptors of full buffers. This Fifo is
18 * HW pops descriptor from RXF Fifo, stores ID, fills buffer with incoming data,
20 * pushes it into RXD Fifo and raises interrupt to indicate new RX data.
23 * One holds 1.5K packets and another - 26K packets. Depending on incoming
24 * packet size, HW desides on a RXF Fifo to pop buffer from. When packet is
[all …]
/Linux-v5.10/drivers/net/ethernet/8390/
D8390.h4 * under the same license. Auto-loading of 8390.o only in v2.2 - Paul G.
17 #define TX_PAGES 12 /* Two Tx slots */
19 /* The 8390 specific per-packet-header format. */
32 /* Without I/O delay - non ISA or later chips */
44 struct net_device *__alloc_ei_netdev(int size);
62 struct net_device *__alloc_eip_netdev(int size);
68 /* You have one of these per-board */
83 unsigned word16:1; /* We have the 16-bit (vs 8-bit)
86 unsigned bigendian:1; /* 16-bit big endian mode. Do NOT
95 unsigned char txqueue; /* Tx Packet buffer queue length. */
[all …]

123456789