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/Linux-v5.10/arch/arm/boot/dts/
Dbcm283x-rpi-usb-otg.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 g-rx-fifo-size = <256>;
5 g-np-tx-fifo-size = <32>;
8 * fifo sizes shouldn't exceed 3776 bytes.
10 g-tx-fifo-size = <256 256 512 512 512 768 768>;
Dbcm283x-rpi-usb-peripheral.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 g-rx-fifo-size = <256>;
5 g-np-tx-fifo-size = <32>;
6 g-tx-fifo-size = <256 256 512 512 512 768 768>;
Drk3xxx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/soc/rockchip,boot-mode.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
15 interrupt-parent = <&gic>;
36 compatible = "simple-bus";
37 #address-cells = <1>;
38 #size-cells = <1>;
[all …]
Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
8 #include <dt-bindings/soc/rockchip,boot-mode.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
16 interrupt-parent = <&gic>;
[all …]
Dmeson.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&gic>;
15 compatible = "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
21 compatible = "simple-bus";
[all …]
Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
[all …]
Drv1108.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/rv1108-cru.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
15 interrupt-parent = <&gic>;
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/usb/
Ddwc2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
15 - const: brcm,bcm2835-usb
16 - const: hisilicon,hi6220-usb
17 - items:
18 - const: rockchip,rk3066-usb
19 - const: snps,dwc2
20 - items:
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Damlogic,meson-g12a-usb-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Neil Armstrong <narmstrong@baylibre.com>
15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode
20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP.
26 host-only mode.
33 - amlogic,meson-gxl-usb-ctrl
34 - amlogic,meson-gxm-usb-ctrl
[all …]
/Linux-v5.10/drivers/net/ethernet/sun/
Dcassini.h1 /* SPDX-License-Identifier: GPL-2.0+ */
29 /* cassini register map: 2M memory mapped in 32-bit memory space accessible as
30 * 32-bit words. there is no i/o port access. REG_ addresses are
41 /* this register sets the weights for the weighted round robin arbiter. e.g.,
42 * if rx weight == 1 and tx weight == 0, rx == 2x tx transfer credit
45 * DEFAULT: 0x0, SIZE: 5 bits
54 /* if enabled, BIM can send bursts across PCI bus > cacheline size. burst
57 * DEFAULT: 0x0, SIZE: 1 bit
62 /* top level interrupts [0-9] are auto-cleared to 0 when the status
63 * register is read. second level interrupts [13 - 18] are cleared at
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/net/
Dintel,dwmac-plat.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
17 - intel,keembay-dwmac
19 - compatible
22 - $ref: "snps,dwmac.yaml#"
27 - items:
28 - enum:
[all …]
/Linux-v5.10/drivers/usb/mtu3/
Dmtu3.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * mtu3.h - MediaTek USB3 DRD header
32 #define MU3D_EP_TXCR0(epnum) (U3D_TX1CSR0 + (((epnum) - 1) * 0x10))
33 #define MU3D_EP_TXCR1(epnum) (U3D_TX1CSR1 + (((epnum) - 1) * 0x10))
34 #define MU3D_EP_TXCR2(epnum) (U3D_TX1CSR2 + (((epnum) - 1) * 0x10))
36 #define MU3D_EP_RXCR0(epnum) (U3D_RX1CSR0 + (((epnum) - 1) * 0x10))
37 #define MU3D_EP_RXCR1(epnum) (U3D_RX1CSR1 + (((epnum) - 1) * 0x10))
38 #define MU3D_EP_RXCR2(epnum) (U3D_RX1CSR2 + (((epnum) - 1) * 0x10))
40 #define USB_QMU_TQHIAR(epnum) (U3D_TXQHIAR1 + (((epnum) - 1) * 0x4))
41 #define USB_QMU_RQHIAR(epnum) (U3D_RXQHIAR1 + (((epnum) - 1) * 0x4))
[all …]
Dmtu3_core.c1 // SPDX-License-Identifier: GPL-2.0
3 * mtu3_core.c - hardware access layer and gadget init/exit of
4 * MediaTek usb3 Dual-Role Controller Driver
11 #include <linux/dma-mapping.h>
25 struct mtu3_fifo_info *fifo = mep->fifo; in ep_fifo_alloc() local
29 /* ensure that @mep->fifo_seg_size is power of two */ in ep_fifo_alloc()
31 if (num_bits > fifo->limit) in ep_fifo_alloc()
32 return -EINVAL; in ep_fifo_alloc()
34 mep->fifo_seg_size = num_bits * MTU3_EP_FIFO_UNIT; in ep_fifo_alloc()
35 num_bits = num_bits * (mep->slot + 1); in ep_fifo_alloc()
[all …]
/Linux-v5.10/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
Dmain.h48 * Usage example, e.g. a three-bit field (bits 4-6):
52 * regval = R_REG(osh, &regs->regfoo);
55 * W_REG(osh, &regs->regfoo, regval);
58 (((unsigned)1 << (width)) - 1)
67 /* max # supported core revisions (0 .. MAXCOREREV - 1) */
76 #define BRCMS_SHORTSLOT_AUTO -1 /* Driver will manage Shortslot setting */
91 #define TXFID_QUEUE_MASK 0x0007 /* Bits 0-2 */
92 #define TXFID_SEQ_MASK 0x7FE0 /* Bits 5-15 */
119 #define DEF_RXINTMASK (I_RI) /* enable rx int on rxfifo only */
130 #define NFIFO 6 /* # tx/rx fifopairs */
[all …]
Dd11.h26 /* RX FIFO numbers */
28 #define RX_TXSTATUS_FIFO 3 /* RX fifo for tx status packages */
30 /* TX FIFO numbers using WME Access Category */
31 #define TX_AC_BK_FIFO 0 /* Background TX FIFO */
32 #define TX_AC_BE_FIFO 1 /* Best-Effort TX FIFO */
33 #define TX_AC_VI_FIFO 2 /* Video TX FIFO */
34 #define TX_AC_VO_FIFO 3 /* Voice TX FIFO */
35 #define TX_BCMC_FIFO 4 /* Broadcast/Multicast TX FIFO */
36 #define TX_ATIM_FIFO 5 /* TX fifo for ATIM window info */
44 /* Legacy TX FIFO numbers */
[all …]
/Linux-v5.10/drivers/usb/musb/
Dmusb_gadget.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2005-2006 by Texas Instruments
7 * Copyright (C) 2006-2007 Nokia Corporation
18 #include <linux/dma-mapping.h>
25 /* ----------------------------------------------------------------------- */
28 (req->map_state != UN_MAPPED))
36 struct dma_controller *dma = musb->dma_controller; in map_dma_buffer()
38 request->map_state = UN_MAPPED; in map_dma_buffer()
40 if (!is_dma_capable() || !musb_ep->dma) in map_dma_buffer()
47 if (dma->is_compatible) in map_dma_buffer()
[all …]
/Linux-v5.10/drivers/net/wireless/broadcom/b43/
Db43.h1 /* SPDX-License-Identifier: GPL-2.0 */
61 /* 32-bit DMA */
68 /* 64-bit DMA */
202 #define B43_BFL2_RXBB_INT_REG_DIS 0x0001 /* external RX BB regulator present */
203 #define B43_BFL2_APLL_WAR 0x0002 /* alternative A-band PLL settings implemented */
206 #define B43_BFL2_5G_PWRGAIN 0x0010 /* supports 5G band power gain */
209 #define B43_BFL2_BTC3WIRE 0x0080 /* used 3-wire bluetooth coexist */
211 #define B43_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */
212 #define B43_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */
234 #define B43_SHM_AUTOINC_R 0x0200 /* Auto-increment address on read */
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/serial/
D8250.yaml3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - devicetree@vger.kernel.org
13 - $ref: /schemas/serial.yaml#
14 - if:
16 - aspeed,sirq-polarity-sense
20 const: aspeed,ast2500-vuart
21 - if:
24 const: mrvl,mmp-uart
27 reg-shift:
[all …]
/Linux-v5.10/Documentation/networking/device_drivers/ethernet/stmicro/
Dstmmac.rst1 .. SPDX-License-Identifier: GPL-2.0+
13 - In This Release
14 - Feature List
15 - Kernel Configuration
16 - Command Line Parameters
17 - Driver Information and Notes
18 - Debug Information
19 - Support
33 (and older) and DesignWare(R) Cores Ethernet Quality-of-Service version 4.0
35 DesignWare(R) Cores XGMAC - 10G Ethernet MAC and DesignWare(R) Cores
[all …]
/Linux-v5.10/drivers/spi/
Dspi-bcm2835.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 * spi-ath79.c, Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
11 * spi-atmel.c, Copyright (C) 2006 Atmel Corporation
18 #include <linux/dma-mapping.h>
75 #define DRV_NAME "spi-bcm2835"
84 * struct bcm2835_spi - BCM2835 SPI controller
87 * @irq: interrupt, signals TX FIFO empty or RX FIFO ¾ full
96 * @rx_prologue: bytes received without DMA if first RX sglist entry's
99 * @prepare_cs: precalculated CS register value for ->prepare_message()
100 * (uses slave-specific clock polarity and phase settings)
[all …]
/Linux-v5.10/drivers/staging/pi433/
Dpi433_if.c1 // SPDX-License-Identifier: GPL-2.0+
13 * HopeRf with a similar interace - e. g. RFM69HCW, RFM12, RFM95, ...
15 * Copyright (C) 2016 Wolf-Entwicklungen
16 * Marcus Wolf <linux@wolf-entwicklungen.de>
64 * rx config is device specific
65 * so we have just one rx config, ebedded in device struct
88 /* rx related values */
98 /* fifo wait queue */
113 /*-------------------------------------------------------------------------*/
120 if (device->irq_state[DIO0] == DIO_PACKET_SENT) { in DIO0_irq_handler()
[all …]
/Linux-v5.10/drivers/net/ethernet/tehuti/
Dtehuti.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * RX HW/SW interaction overview
11 * There are 2 types of RX communication channels between driver and NIC.
12 * 1) RX Free Fifo - RXF - holds descriptors of empty buffers to accept incoming
13 * traffic. This Fifo is filled by SW and is readen by HW. Each descriptor holds
14 * info about buffer's location, size and ID. An ID field is used to identify a
15 * buffer when it's returned with data via RXD Fifo (see below)
16 * 2) RX Data Fifo - RXD - holds descriptors of full buffers. This Fifo is
18 * HW pops descriptor from RXF Fifo, stores ID, fills buffer with incoming data,
20 * pushes it into RXD Fifo and raises interrupt to indicate new RX data.
[all …]
Dtehuti.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
30 #include <linux/dma-mapping.h>
53 /* RX copy break size */
60 #define BDX_NIC2PORT_NAME "Tehuti 2-Port 10 Giga TOE SmartNIC"
70 * ifcontig eth1 txqueuelen 3000 - to change it at runtime */
97 #define READ_REG(pp, reg) readl(pp->pBdxRegs + reg)
98 #define WRITE_REG(pp, reg, val) writel(val, pp->pBdxRegs + reg)
111 #define BDX_MAX_TX_LEVEL (priv->txd_fifo0.m.memsz - 16)
127 #define BITS_MASK(nbits) ((1<<nbits)-1)
142 struct fifo { struct
[all …]
/Linux-v5.10/drivers/net/ethernet/freescale/fman/
Dfman_memac.c2 * Copyright 2008-2015 Freescale Semiconductor Inc.
80 #define CMD_CFG_REG_LOWP_RXETY 0x01000000 /* 07 Rx low power indication */
93 /* Transmit FIFO Sections Register (TX_FIFO_SECTIONS) */
112 #define IF_MODE_MASK 0x00000003 /* 30-31 Mask on i/f mode bits */
113 #define IF_MODE_10G 0x00000000 /* 30-31 10G interface */
114 #define IF_MODE_GMII 0x00000002 /* 30-31 GMII (1G) interface */
117 #define IF_MODE_RGMII_1000 0x00004000 /* 10 - 1000Mbps RGMII */
118 #define IF_MODE_RGMII_100 0x00000000 /* 00 - 100Mbps RGMII */
119 #define IF_MODE_RGMII_10 0x00002000 /* 01 - 10Mbps RGMII */
126 /* 26-31 Hash table address code */
[all …]
/Linux-v5.10/drivers/usb/gadget/udc/
Dsnps_udc_core.c1 // SPDX-License-Identifier: GPL-2.0+
3 * amd5536.c -- AMD 5536 UDC high/full speed USB device controller
5 * Copyright (C) 2005-2007 AMD (https://www.amd.com)
64 * slave mode: pending bytes in rx fifo after nyet,
77 /* set_rde -- Is used to control enabling of RX DMA. Problem is
78 * that UDC has only one bit (RDE) to enable/disable RX DMA for
80 * when OUT data reaches the fifo but no request was queued yet.
81 * This cannot be solved by letting the RX DMA disabled until a
83 * in the FIFO (important for not blocking control traffic).
86 * set_rde -1 == not used, means it is alloed to be set to 0 or 1
[all …]

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