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/Linux-v6.6/lib/
Dkfifo.c3 * A generic kernel FIFO implementation
17 * internal helper to calculate the unused elements in a fifo
19 static inline unsigned int kfifo_unused(struct __kfifo *fifo) in kfifo_unused() argument
21 return (fifo->mask + 1) - (fifo->in - fifo->out); in kfifo_unused()
24 int __kfifo_alloc(struct __kfifo *fifo, unsigned int size, in __kfifo_alloc() argument
33 fifo->in = 0; in __kfifo_alloc()
34 fifo->out = 0; in __kfifo_alloc()
35 fifo->esize = esize; in __kfifo_alloc()
38 fifo->data = NULL; in __kfifo_alloc()
39 fifo->mask = 0; in __kfifo_alloc()
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/Linux-v6.6/include/linux/
Dkfifo.h3 * A generic kernel FIFO implementation
12 * How to porting drivers to the new generic FIFO API:
31 * and one writer is using the fifo and no kfifo_reset() will be called.
98 * helper macro to distinguish between real in place fifo where the fifo
99 * array is a part of the structure and the fifo type where the array is
100 * outside of the fifo structure.
102 #define __is_kfifo_ptr(fifo) \ argument
103 (sizeof(*fifo) == sizeof(STRUCT_KFIFO_PTR(typeof(*(fifo)->type))))
106 * DECLARE_KFIFO_PTR - macro to declare a fifo pointer object
107 * @fifo: name of the declared fifo
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Dpxa2xx_ssp.h62 #define SSCR0_RIM BIT(22) /* Receive FIFO overrun interrupt mask */
63 #define SSCR0_TUM BIT(23) /* Transmit FIFO underrun interrupt mask */
66 #define SSCR0_FPCKE BIT(29) /* FIFO packing enable */
70 #define SSCR1_RIE BIT(0) /* Receive FIFO Interrupt Enable */
71 #define SSCR1_TIE BIT(1) /* Transmit FIFO Interrupt Enable */
78 #define SSSR_TNF BIT(2) /* Transmit FIFO Not Full */
79 #define SSSR_RNE BIT(3) /* Receive FIFO Not Empty */
81 #define SSSR_TFS BIT(5) /* Transmit FIFO Service Request */
82 #define SSSR_RFS BIT(6) /* Receive FIFO Service Request */
83 #define SSSR_ROR BIT(7) /* Receive FIFO Overrun */
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/Linux-v6.6/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
Dbase.c44 nvkm_runl_foreach(runl, engine->subdev.device->fifo) { in nvkm_fifo_ctxsw_in_progress()
55 nvkm_fifo_pause(struct nvkm_fifo *fifo, unsigned long *flags) in nvkm_fifo_pause() argument
57 return fifo->func->pause(fifo, flags); in nvkm_fifo_pause()
61 nvkm_fifo_start(struct nvkm_fifo *fifo, unsigned long *flags) in nvkm_fifo_start() argument
63 return fifo->func->start(fifo, flags); in nvkm_fifo_start()
67 nvkm_fifo_fault(struct nvkm_fifo *fifo, struct nvkm_fault_data *info) in nvkm_fifo_fault() argument
69 return fifo->func->mmu_fault->recover(fifo, info); in nvkm_fifo_fault()
76 struct nvkm_fifo *fifo = nvkm_fifo(oclass->engine); in nvkm_fifo_class_new() local
78 if (oclass->engn == &fifo->func->cgrp.user) in nvkm_fifo_class_new()
79 return nvkm_ucgrp_new(fifo, oclass, argv, argc, pobject); in nvkm_fifo_class_new()
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DKbuild2 nvkm-y += nvkm/engine/fifo/base.o
3 nvkm-y += nvkm/engine/fifo/cgrp.o
4 nvkm-y += nvkm/engine/fifo/chan.o
5 nvkm-y += nvkm/engine/fifo/chid.o
6 nvkm-y += nvkm/engine/fifo/runl.o
7 nvkm-y += nvkm/engine/fifo/runq.o
9 nvkm-y += nvkm/engine/fifo/nv04.o
10 nvkm-y += nvkm/engine/fifo/nv10.o
11 nvkm-y += nvkm/engine/fifo/nv17.o
12 nvkm-y += nvkm/engine/fifo/nv40.o
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Dgf100.c43 nvkm_wr32(chan->cgrp->runl->fifo->engine.subdev.device, 0x002634, chan->id); in gf100_chan_preempt()
49 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in gf100_chan_stop()
57 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in gf100_chan_start()
67 struct nvkm_fifo *fifo = chan->cgrp->runl->fifo; in gf100_chan_unbind() local
68 struct nvkm_device *device = fifo->engine.subdev.device; in gf100_chan_unbind()
71 gf100_fifo_intr_engine(fifo); in gf100_chan_unbind()
79 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in gf100_chan_bind()
205 struct nvkm_fifo *fifo = runl->fifo; in gf100_engn_mmu_fault_triggered() local
206 struct nvkm_device *device = fifo->engine.subdev.device; in gf100_engn_mmu_fault_triggered()
213 spin_lock(&fifo->lock); in gf100_engn_mmu_fault_triggered()
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Dnv04.c43 struct nvkm_fifo *fifo = chan->cgrp->runl->fifo; in nv04_chan_stop() local
44 struct nvkm_device *device = fifo->engine.subdev.device; in nv04_chan_stop()
51 /* prevent fifo context switches */ in nv04_chan_stop()
52 spin_lock_irqsave(&fifo->lock, flags); in nv04_chan_stop()
56 chid = nvkm_rd32(device, NV03_PFIFO_CACHE1_PUSH1) & fifo->chid->mask; in nv04_chan_stop()
80 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH1, fifo->chid->mask); in nv04_chan_stop()
88 spin_unlock_irqrestore(&fifo->lock, flags); in nv04_chan_stop()
94 struct nvkm_fifo *fifo = chan->cgrp->runl->fifo; in nv04_chan_start() local
97 spin_lock_irqsave(&fifo->lock, flags); in nv04_chan_start()
98 nvkm_mask(fifo->engine.subdev.device, NV04_PFIFO_MODE, BIT(chan->id), BIT(chan->id)); in nv04_chan_start()
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/Linux-v6.6/sound/soc/meson/
Daxg-fifo.c16 #include "axg-fifo.h"
20 * capture frontend DAI. The logic behind this two types of fifo is very
67 static void __dma_enable(struct axg_fifo *fifo, bool enable) in __dma_enable() argument
69 regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_DMA_EN, in __dma_enable()
76 struct axg_fifo *fifo = axg_fifo_data(ss); in axg_fifo_pcm_trigger() local
82 __dma_enable(fifo, true); in axg_fifo_pcm_trigger()
87 __dma_enable(fifo, false); in axg_fifo_pcm_trigger()
100 struct axg_fifo *fifo = axg_fifo_data(ss); in axg_fifo_pcm_pointer() local
104 regmap_read(fifo->map, FIFO_STATUS2, &addr); in axg_fifo_pcm_pointer()
115 struct axg_fifo *fifo = axg_fifo_data(ss); in axg_fifo_pcm_hw_params() local
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Daiu-fifo.c13 #include "aiu-fifo.h"
37 struct aiu_fifo *fifo = snd_soc_dai_dma_data_get_playback(dai); in aiu_fifo_pointer() local
41 addr = snd_soc_component_read(component, fifo->mem_offset + AIU_MEM_RD); in aiu_fifo_pointer()
49 struct aiu_fifo *fifo = snd_soc_dai_dma_data_get_playback(dai); in aiu_fifo_enable() local
54 fifo->mem_offset + AIU_MEM_CONTROL, in aiu_fifo_enable()
83 struct aiu_fifo *fifo = snd_soc_dai_dma_data_get_playback(dai); in aiu_fifo_prepare() local
86 fifo->mem_offset + AIU_MEM_CONTROL, in aiu_fifo_prepare()
90 fifo->mem_offset + AIU_MEM_CONTROL, in aiu_fifo_prepare()
101 struct aiu_fifo *fifo = snd_soc_dai_dma_data_get_playback(dai); in aiu_fifo_hw_params() local
104 /* Setup the fifo boundaries */ in aiu_fifo_hw_params()
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/Linux-v6.6/drivers/staging/axis-fifo/
Daxis-fifo.c3 * Xilinx AXIS FIFO: interface to the Xilinx AXI-Stream FIFO IP core
91 #define XLLF_INT_TFPF_MASK 0x00400000 /* Tx FIFO Programmable Full */
92 #define XLLF_INT_TFPE_MASK 0x00200000 /* Tx FIFO Programmable Empty */
93 #define XLLF_INT_RFPF_MASK 0x00100000 /* Rx FIFO Programmable Full */
94 #define XLLF_INT_RFPE_MASK 0x00080000 /* Rx FIFO Programmable Empty */
126 unsigned int rx_fifo_depth; /* max words in the receive fifo */
127 unsigned int tx_fifo_depth; /* max words in the transmit fifo */
128 int has_rx_fifo; /* whether the IP has the rx fifo enabled */
129 int has_tx_fifo; /* whether the IP has the tx fifo enabled */
150 struct axis_fifo *fifo = dev_get_drvdata(dev); in sysfs_write() local
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/Linux-v6.6/drivers/platform/mellanox/
Dmlxbf-tmfifo.c38 /* Virtual devices sharing the TM FIFO. */
71 * @fifo: pointer to the tmfifo structure
88 struct mlxbf_tmfifo *fifo; member
127 * @tx_buf: tx buffer used to buffer data before writing into the FIFO
143 * @fifo: pointer to the tmfifo structure
148 struct mlxbf_tmfifo *fifo; member
173 * @rx_fifo_size: number of entries of the Rx FIFO
174 * @tx_fifo_size: number of entries of the Tx FIFO
204 * @len: payload length in network byte order. Messages sent into the FIFO
238 /* Free vrings of the FIFO device. */
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/Linux-v6.6/drivers/usb/renesas_usbhs/
Dfifo.c98 struct usbhs_fifo *fifo);
99 static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
109 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe); in usbhs_pkt_pop() local
123 if (fifo) in usbhs_pkt_pop()
124 chan = usbhsf_dma_chan_get(fifo, pkt); in usbhs_pkt_pop()
141 if (fifo) in usbhs_pkt_pop()
142 usbhsf_fifo_unselect(pipe, fifo); in usbhs_pkt_pop()
255 * FIFO ctrl
258 struct usbhs_fifo *fifo) in usbhsf_send_terminator() argument
262 usbhs_bset(priv, fifo->ctr, BVAL, BVAL); in usbhsf_send_terminator()
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/Linux-v6.6/drivers/iio/imu/inv_icm42600/
Dinv_icm42600_buffer.c20 /* FIFO header: 1 byte */
52 /* FIFO empty */ in inv_icm42600_fifo_decode_packet()
105 if (st->fifo.en & INV_ICM42600_SENSOR_GYRO) in inv_icm42600_buffer_update_fifo_period()
110 if (st->fifo.en & INV_ICM42600_SENSOR_ACCEL) in inv_icm42600_buffer_update_fifo_period()
120 st->fifo.period = period; in inv_icm42600_buffer_update_fifo_period()
129 /* update only FIFO EN bits */ in inv_icm42600_buffer_set_fifo_en()
147 st->fifo.en = fifo_en; in inv_icm42600_buffer_set_fifo_en()
182 * inv_icm42600_buffer_update_watermark - update watermark FIFO threshold
187 * FIFO watermark threshold is computed based on the required watermark values
200 * to the FIFO frequency. Beware that this is only true because we are not
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/Linux-v6.6/drivers/md/bcache/
Dutil.h120 #define fifo_for_each(c, fifo, iter) \ argument
121 for (iter = (fifo)->front; \
122 c = (fifo)->data[iter], iter != (fifo)->back; \
123 iter = (iter + 1) & (fifo)->mask)
125 #define __init_fifo(fifo, gfp) \ argument
128 BUG_ON(!(fifo)->size); \
130 _allocated_size = roundup_pow_of_two((fifo)->size + 1); \
131 _bytes = _allocated_size * sizeof(*(fifo)->data); \
133 (fifo)->mask = _allocated_size - 1; \
134 (fifo)->front = (fifo)->back = 0; \
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/Linux-v6.6/drivers/usb/fotg210/
Dfotg210-udc.h47 /* Cx configuration and FIFO Empty Status register(0x120) */
49 #define DCFESR_FIFO_EMPTY(fifo) (1 << 8 << (fifo)) argument
78 #define DMISGR1_MF_IN_INT(fifo) (1 << (16 + (fifo))) argument
87 #define DMISGR1_MF_OUTSPK_INT(fifo) (0x3 << (fifo) * 2) argument
111 #define DISGR1_OUT_INT(fifo) (1 << ((fifo) * 2)) argument
112 #define DISGR1_SPK_INT(fifo) (1 << 1 << ((fifo) * 2)) argument
113 #define DISGR1_IN_INT(fifo) (1 << 16 << (fifo)) argument
165 /* Device FIFO Map Register (0x1A8) */
167 #define FIFOMAP_DIROUT(fifo) (0x0 << 4 << (fifo) * 8) argument
168 #define FIFOMAP_DIRIN(fifo) (0x1 << 4 << (fifo) * 8) argument
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/Linux-v6.6/sound/core/seq/
Dseq_fifo.h3 * ALSA sequencer FIFO
13 /* === FIFO === */
16 struct snd_seq_pool *pool; /* FIFO pool */
17 struct snd_seq_event_cell *head; /* pointer to head of fifo */
18 struct snd_seq_event_cell *tail; /* pointer to tail of fifo */
27 /* create new fifo (constructor) */
30 /* delete fifo (destructor) */
34 /* enqueue event to fifo */
37 /* lock fifo from release */
38 #define snd_seq_fifo_lock(fifo) snd_use_lock_use(&(fifo)->use_lock) argument
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/Linux-v6.6/drivers/net/ethernet/intel/fm10k/
Dfm10k_mbx.c7 * fm10k_fifo_init - Initialize a message FIFO
8 * @fifo: pointer to FIFO
9 * @buffer: pointer to memory to be used to store FIFO
10 * @size: maximum message size to store in FIFO, must be 2^n - 1
12 static void fm10k_fifo_init(struct fm10k_mbx_fifo *fifo, u32 *buffer, u16 size) in fm10k_fifo_init() argument
14 fifo->buffer = buffer; in fm10k_fifo_init()
15 fifo->size = size; in fm10k_fifo_init()
16 fifo->head = 0; in fm10k_fifo_init()
17 fifo->tail = 0; in fm10k_fifo_init()
21 * fm10k_fifo_used - Retrieve used space in FIFO
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/Linux-v6.6/arch/powerpc/platforms/powernv/
Dvas-fault.c21 * The maximum FIFO size for fault window can be 8MB
22 * (VAS_RX_FIFO_SIZE_MAX). Using 4MB FIFO since each VAS
24 * 8MB FIFO can be used if expects more faults for each VAS
32 unsigned long *fifo = entry; in dump_fifo() local
35 pr_err("Fault fifo size %d, Max crbs %d\n", vinst->fault_fifo_size, in dump_fifo()
38 /* Dump 10 CRB entries or until end of FIFO */ in dump_fifo()
39 pr_err("Fault FIFO Dump:\n"); in dump_fifo()
40 for (i = 0; i < 10*(CRB_SIZE/8) && fifo < end; i += 4, fifo += 4) { in dump_fifo()
42 i, fifo, *fifo, *(fifo+1), *(fifo+2), *(fifo+3)); in dump_fifo()
47 * Process valid CRBs in fault FIFO.
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/Linux-v6.6/drivers/isdn/hardware/mISDN/
Dhfcsusb.c697 conhdlc = 8; /* enable FIFO */ in hfcsusb_setup_bch()
803 hfcsusb_rx_frame(struct usb_fifo *fifo, __u8 *data, unsigned int len, in hfcsusb_rx_frame() argument
806 struct hfcsusb *hw = fifo->hw; in hfcsusb_rx_frame()
809 int fifon = fifo->fifonum; in hfcsusb_rx_frame()
815 printk(KERN_DEBUG "%s: %s: fifo(%i) len(%i) " in hfcsusb_rx_frame()
818 fifo->dch, fifo->bch, fifo->ech); in hfcsusb_rx_frame()
823 if ((!!fifo->dch + !!fifo->bch + !!fifo->ech) != 1) { in hfcsusb_rx_frame()
830 if (fifo->dch) { in hfcsusb_rx_frame()
831 rx_skb = fifo->dch->rx_skb; in hfcsusb_rx_frame()
832 maxlen = fifo->dch->maxlen; in hfcsusb_rx_frame()
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/Linux-v6.6/Documentation/devicetree/bindings/powerpc/fsl/
Dmpc5121-psc.txt8 fsl,mpc5121-immr SoC node. Additionally the PSC FIFO
9 Controller node fsl,mpc5121-psc-fifo is required there:
19 PSC FIFO Controller and b is a field that represents an
23 - fsl,rx-fifo-size : the size of the RX fifo slice (a multiple of 4)
24 - fsl,tx-fifo-size : the size of the TX fifo slice (a multiple of 4)
30 for that is fsl,mpc5121-psc-spi. It requires a fsl,mpc5121-psc-fifo as well.
35 fsl,mpc512x-psc-fifo node
39 - compatible : Should be "fsl,<soc>-psc-fifo"
42 FIFO Controller
44 PSC FIFO Controller and b is a field that represents an
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/Linux-v6.6/drivers/spi/
Dspi-mpc512x-psc.c55 struct mpc512x_psc_fifo __iomem *fifo; member
147 struct mpc512x_psc_fifo __iomem *fifo = mps->fifo; in mpc512x_psc_spi_transfer_rxtx() local
167 fifosz = MPC512x_PSC_FIFO_SZ(in_be32(&fifo->txsz)); in mpc512x_psc_spi_transfer_rxtx()
169 fifosz = MPC512x_PSC_FIFO_SZ(in_be32(&fifo->rxsz)); in mpc512x_psc_spi_transfer_rxtx()
170 fifosz -= in_be32(&fifo->rxcnt) + 1; in mpc512x_psc_spi_transfer_rxtx()
174 /* fill the TX FIFO */ in mpc512x_psc_spi_transfer_rxtx()
178 setbits32(&fifo->txcmd, in mpc512x_psc_spi_transfer_rxtx()
180 out_8(&fifo->txdata_8, data); in mpc512x_psc_spi_transfer_rxtx()
184 /* have the ISR trigger when the TX FIFO is empty */ in mpc512x_psc_spi_transfer_rxtx()
186 out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY); in mpc512x_psc_spi_transfer_rxtx()
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/Linux-v6.6/sound/arm/
Dpxa2xx-ac97-regs.h10 #define POCR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */
11 #define POCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
14 #define PICR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */
15 #define PICR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
18 #define MCCR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */
19 #define MCCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
38 #define POSR_FIFOE (1 << 4) /* FIFO error */
39 #define POSR_FSR (1 << 2) /* FIFO Service Request */
42 #define PISR_FIFOE (1 << 4) /* FIFO error */
44 #define PISR_FSR (1 << 2) /* FIFO Service Request */
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/Linux-v6.6/samples/kfifo/
Ddma-example.c3 * Sample fifo dma implementation
13 * This module shows how to handle fifo dma operations.
16 /* fifo size in elements (bytes) */
19 static struct kfifo fifo; variable
28 printk(KERN_INFO "DMA fifo test start\n"); in example_init()
30 if (kfifo_alloc(&fifo, FIFO_SIZE, GFP_KERNEL)) { in example_init()
35 printk(KERN_INFO "queue size: %u\n", kfifo_size(&fifo)); in example_init()
37 kfifo_in(&fifo, "test", 4); in example_init()
40 kfifo_put(&fifo, i); in example_init()
43 kfifo_skip(&fifo); in example_init()
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/Linux-v6.6/drivers/gpu/drm/vmwgfx/
Dvmwgfx_cmd.c38 const struct vmw_fifo_state *fifo = dev_priv->fifo; in vmw_supports_3d() local
64 ((fifo->capabilities & in vmw_supports_3d()
98 struct vmw_fifo_state *fifo; in vmw_fifo_create() local
105 fifo = kzalloc(sizeof(*fifo), GFP_KERNEL); in vmw_fifo_create()
106 if (!fifo) in vmw_fifo_create()
108 fifo->static_buffer_size = VMWGFX_FIFO_STATIC_SIZE; in vmw_fifo_create()
109 fifo->static_buffer = vmalloc(fifo->static_buffer_size); in vmw_fifo_create()
110 if (unlikely(fifo->static_buffer == NULL)) { in vmw_fifo_create()
111 kfree(fifo); in vmw_fifo_create()
115 fifo->dynamic_buffer = NULL; in vmw_fifo_create()
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/Linux-v6.6/drivers/char/xilinx_hwicap/
Dfifo_icap.c39 #define XHI_WF_OFFSET 0x100 /* Write FIFO */
40 #define XHI_RF_OFFSET 0x104 /* Read FIFO */
44 #define XHI_WFV_OFFSET 0x114 /* Write FIFO Vacancy Register */
45 #define XHI_RFO_OFFSET 0x118 /* Read FIFO Occupancy Register */
66 #define XHI_IPIXR_RFULL_MASK 0x00000008 /* Read FIFO Full */
67 #define XHI_IPIXR_WEMPTY_MASK 0x00000004 /* Write FIFO Empty */
68 #define XHI_IPIXR_RDP_MASK 0x00000002 /* Read FIFO half full */
69 #define XHI_IPIXR_WRP_MASK 0x00000001 /* Write FIFO half full */
74 #define XHI_CR_FIFO_CLR_MASK 0x00000004 /* FIFO Clear Mask */
75 #define XHI_CR_READ_MASK 0x00000002 /* Read from ICAP to FIFO */
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