Searched +full:exynos5420 +full:- +full:usbdrd +full:- +full:phy (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---4 $id: http://devicetree.org/schemas/phy/samsung,usb3-drd-phy.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Samsung Exynos SoC USB 3.0 DRD PHY USB 2.0 PHY10 - Krzysztof Kozlowski <krzk@kernel.org>11 - Marek Szyprowski <m.szyprowski@samsung.com>12 - Sylwester Nawrocki <s.nawrocki@samsung.com>15 For samsung,exynos5250-usbdrd-phy and samsung,exynos5420-usbdrd-phy16 compatible PHYs, the second cell in the PHY specifier identifies the[all …]
1 // SPDX-License-Identifier: GPL-2.05 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.28 arm_a7_pmu: arm-a7-pmu {29 compatible = "arm,cortex-a7-pmu";30 interrupt-parent = <&gic>;38 arm_a15_pmu: arm-a15-pmu {39 compatible = "arm,cortex-a15-pmu";40 interrupt-parent = <&combiner>;49 compatible = "arm,armv7-timer";54 clock-frequency = <24000000>;[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * Samsung Exynos5 SoC series USB DRD PHY driver5 * Phy provider for USB 3.0 DRD controller on Exynos5 SoC series20 #include <linux/phy/phy.h>26 #include <linux/soc/samsung/exynos-regs-pmu.h>28 /* Exynos USB PHY registers */37 /* Exynos5: USB 3.0 DRD PHY registers */130 /* USB 3.0 DRD PHY SS Function Control Reg; accessed by CR_PORT */176 * struct exynos5_usbdrd_phy - driver data for USB 3.0 PHY178 * @reg_phy: usb phy controller register memory base[all …]
