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Searched +full:exynos4210 +full:- +full:sysram (Results 1 – 10 of 10) sorted by relevance

/Linux-v6.1/Documentation/devicetree/bindings/sram/
Dsram.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic on-chip SRAM
10 - Rob Herring <robh@kernel.org>
19 Following the generic-names recommended practice, node names should
30 - mmio-sram
31 - amlogic,meson-gxbb-sram
32 - arm,juno-sram-ns
33 - atmel,sama5d2-securam
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/Linux-v6.1/arch/arm/mach-exynos/
Dexynos.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
15 #include <linux/soc/samsung/exynos-regs-pmu.h>
18 #include <asm/hardware/cache-l2x0.h>
33 .id = -1,
52 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") { in exynos_sysram_init()
62 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") { in exynos_sysram_init()
78 if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid")) in exynos_fdt_map_chipid()
86 iodesc.length = be32_to_cpu(reg[1]) - 1; in exynos_fdt_map_chipid()
135 * Apparently, these SoCs are not able to wake-up from suspend using
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Dsuspend.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
6 // Exynos - Suspend support
8 // Based on arch/arm/mach-s3c2410/pm.c
23 #include <linux/soc/samsung/exynos-pmu.h>
24 #include <linux/soc/samsung/exynos-regs-pmu.h>
27 #include <asm/hardware/cache-l2x0.h>
36 #define REG_TABLE_END (-1U)
41 * struct exynos_wkup_irq - PMU IRQ to mask mapping
43 * @mask: Mask in PMU wake-up mask register
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Dmcpm-exynos.c1 // SPDX-License-Identifier: GPL-2.0
5 // Based on arch/arm/mach-vexpress/dcscb.c
7 #include <linux/arm-cci.h>
12 #include <linux/soc/samsung/exynos-regs-pmu.h>
65 return -EINVAL; in exynos_cpu_powerup()
87 timeout--; in exynos_cpu_powerup()
95 return -ETIMEDOUT; in exynos_cpu_powerup()
110 return -EINVAL; in exynos_cluster_powerup()
143 * On the Cortex-A15 we need to disable in exynos_cluster_cache_disable()
157 * Disable cluster-level coherency by masking in exynos_cluster_cache_disable()
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/Linux-v6.1/arch/arm/boot/dts/
Dexynos4210.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 SoC device tree source
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
10 * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
15 * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
20 #include "exynos4-cpu-thermal.dtsi"
23 compatible = "samsung,exynos4210", "samsung,exynos4";
32 #address-cells = <1>;
33 #size-cells = <0>;
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Dexynos54xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
28 arm_a7_pmu: arm-a7-pmu {
29 compatible = "arm,cortex-a7-pmu";
30 interrupt-parent = <&gic>;
38 arm_a15_pmu: arm-a15-pmu {
39 compatible = "arm,cortex-a15-pmu";
40 interrupt-parent = <&combiner>;
49 compatible = "arm,armv7-timer";
54 clock-frequency = <24000000>;
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Dexynos4210-universal_c210.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 based Universal C210 board device tree source
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
9 * Samsung's Exynos4210 rev0 SoC.
12 /dts-v1/;
13 #include "exynos4210.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
17 model = "Samsung Universal C210 based on Exynos4210 rev0";
18 compatible = "samsung,universal_c210", "samsung,exynos4210", "samsung,exynos4";
19 chassis-type = "handset";
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Dexynos3250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include "exynos4-cpu-thermal.dtsi"
18 #include <dt-bindings/clock/exynos3250.h>
19 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 #include <dt-bindings/interrupt-controller/irq.h>
24 interrupt-parent = <&gic>;
25 #address-cells = <1>;
26 #size-cells = <1>;
50 #address-cells = <1>;
51 #size-cells = <0>;
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Dexynos5250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
50 #address-cells = <1>;
51 #size-cells = <0>;
53 cpu-map {
66 compatible = "arm,cortex-a15";
69 clock-names = "cpu";
70 operating-points-v2 = <&cpu0_opp_table>;
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Dexynos4412.dtsi1 // SPDX-License-Identifier: GPL-2.0
19 #include "exynos4-cpu-thermal.dtsi"
29 fimc-lite0 = &fimc_lite_0;
30 fimc-lite1 = &fimc_lite_1;
35 #address-cells = <1>;
36 #size-cells = <0>;
38 cpu-map {
57 compatible = "arm,cortex-a9";
60 clock-names = "cpu";
61 operating-points-v2 = <&cpu0_opp_table>;
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