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/Linux-v6.1/Documentation/devicetree/bindings/arm/mediatek/
Dmediatek,ethsys.txt1 Mediatek ethsys controller
4 The Mediatek ethsys controller provides various clocks to the system.
9 - "mediatek,mt2701-ethsys", "syscon"
10 - "mediatek,mt7622-ethsys", "syscon"
11 - "mediatek,mt7623-ethsys", "mediatek,mt2701-ethsys", "syscon"
12 - "mediatek,mt7629-ethsys", "syscon"
13 - "mediatek,mt7986-ethsys", "syscon"
17 The ethsys controller uses the common clk binding from
23 ethsys: clock-controller@1b000000 {
24 compatible = "mediatek,mt2701-ethsys", "syscon";
/Linux-v6.1/Documentation/devicetree/bindings/net/
Dmediatek,net.yaml49 mediatek,ethsys:
280 - mediatek,ethsys
302 <&ethsys CLK_ETH_ESW_EN>,
303 <&ethsys CLK_ETH_GP0_EN>,
304 <&ethsys CLK_ETH_GP1_EN>,
305 <&ethsys CLK_ETH_GP2_EN>,
317 mediatek,ethsys = <&ethsys>;
382 clocks = <&ethsys CLK_ETH_FE_EN>,
383 <&ethsys CLK_ETH_GP2_EN>,
384 <&ethsys CLK_ETH_GP1_EN>,
[all …]
/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt7986a.dtsi221 ethsys: syscon@15000000 { label
224 compatible = "mediatek,mt7986-ethsys",
260 clocks = <&ethsys CLK_ETH_FE_EN>,
261 <&ethsys CLK_ETH_GP2_EN>,
262 <&ethsys CLK_ETH_GP1_EN>,
263 <&ethsys CLK_ETH_WOCPU1_EN>,
264 <&ethsys CLK_ETH_WOCPU0_EN>,
285 mediatek,ethsys = <&ethsys>;
Dmt7622.dtsi928 ethsys: syscon@1b000000 { label
929 compatible = "mediatek,mt7622-ethsys",
940 clocks = <&ethsys CLK_ETH_HSDMA_EN>;
976 <&ethsys CLK_ETH_ESW_EN>,
977 <&ethsys CLK_ETH_GP0_EN>,
978 <&ethsys CLK_ETH_GP1_EN>,
979 <&ethsys CLK_ETH_GP2_EN>,
991 mediatek,ethsys = <&ethsys>;
/Linux-v6.1/arch/arm/boot/dts/
Dmt7629.dtsi431 ethsys: syscon@1b000000 { label
432 compatible = "mediatek,mt7629-ethsys", "syscon";
446 <&ethsys CLK_ETH_ESW_EN>,
447 <&ethsys CLK_ETH_GP0_EN>,
448 <&ethsys CLK_ETH_GP1_EN>,
449 <&ethsys CLK_ETH_GP2_EN>,
450 <&ethsys CLK_ETH_FE_EN>,
472 mediatek,ethsys = <&ethsys>;
Dmt2701.dtsi721 ethsys: syscon@1b000000 { label
722 compatible = "mediatek,mt2701-ethsys", "syscon";
735 <&ethsys CLK_ETHSYS_ESW>,
736 <&ethsys CLK_ETHSYS_GP1>,
737 <&ethsys CLK_ETHSYS_GP2>,
740 resets = <&ethsys MT2701_ETHSYS_FE_RST>,
741 <&ethsys MT2701_ETHSYS_GMAC_RST>,
742 <&ethsys MT2701_ETHSYS_PPE_RST>;
745 mediatek,ethsys = <&ethsys>;
Dmt7623.dtsi941 ethsys: syscon@1b000000 { label
942 compatible = "mediatek,mt7623-ethsys",
943 "mediatek,mt2701-ethsys",
954 clocks = <&ethsys CLK_ETHSYS_HSDMA>;
969 <&ethsys CLK_ETHSYS_ESW>,
970 <&ethsys CLK_ETHSYS_GP1>,
971 <&ethsys CLK_ETHSYS_GP2>,
974 resets = <&ethsys MT2701_ETHSYS_FE_RST>,
975 <&ethsys MT2701_ETHSYS_GMAC_RST>,
976 <&ethsys MT2701_ETHSYS_PPE_RST>;
[all …]
Dmt7623a-rfb-emmc.dts138 resets = <&ethsys MT2701_ETHSYS_MCM_RST>;
Dmt7623a-rfb-nand.dts142 resets = <&ethsys MT2701_ETHSYS_MCM_RST>;
/Linux-v6.1/drivers/net/ethernet/mediatek/
Dmtk_eth_path.c134 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in set_mux_gmac1_gmac2_to_sgmii_rgmii()
149 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in set_mux_gmac1_gmac2_to_sgmii_rgmii()
163 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in set_mux_gmac12_to_gephy_sgmii()
180 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in set_mux_gmac12_to_gephy_sgmii()
Dmtk_eth_soc.c325 regmap_read(eth->ethsys, ETHSYS_SYSCFG, &val); in mt7621_gmac0_rgmii_adjust()
336 regmap_update_bits(eth->ethsys, ETHSYS_CLKCFG0, in mt7621_gmac0_rgmii_adjust()
361 regmap_update_bits(eth->ethsys, ETHSYS_CLKCFG0, in mtk_gmac0_rgmii_adjust()
506 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in mtk_mac_config()
509 regmap_write(eth->ethsys, ETHSYS_SYSCFG0, val); in mtk_mac_config()
520 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in mtk_mac_config()
522 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in mtk_mac_config()
557 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in mtk_mac_finish()
3132 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, in ethsys_reset()
3137 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, in ethsys_reset()
[all …]
/Linux-v6.1/drivers/clk/mediatek/
DKconfig47 bool "Clock driver for MediaTek MT2701 ethsys"
50 This driver supports MediaTek MT2701 ethsys clocks.
341 bool "Clock driver for MediaTek MT7622 ETHSYS"
371 bool "Clock driver for MediaTek MT7629 ETHSYS"
394 bool "Clock driver for MediaTek MT7986 ETHSYS"
Dclk-mt2701-eth.c48 { .compatible = "mediatek,mt2701-ethsys", },
Dclk-mt7622-eth.c120 .compatible = "mediatek,mt7622-ethsys",
Dclk-mt7986-eth.c132 CLK_OF_DECLARE(mtk_ethsys, "mediatek,mt7986-ethsys", mtk_ethsys_init);
Dclk-mt7629-eth.c131 .compatible = "mediatek,mt7629-ethsys",
/Linux-v6.1/Documentation/devicetree/bindings/crypto/
Dmediatek-crypto.txt22 clocks = <&ethsys CLK_ETHSYS_CRYPTO>;
/Linux-v6.1/include/dt-bindings/reset/
Dmt7986-resets.h46 /* ETHSYS Subsystem resets */
Dmt2701-resets.h75 /* ETHSYS resets */
Dmt7622-reset.h76 /* ETHSYS Subsystem resets */
/Linux-v6.1/Documentation/devicetree/bindings/dma/
Dmtk-hsdma.txt27 clocks = <&ethsys CLK_ETHSYS_HSDMA>;
/Linux-v6.1/include/dt-bindings/clock/
Dmt7986-clk.h161 /* ETHSYS */
Dmt7629-clk.h188 /* ETHSYS */
Dmt7622-clk.h264 /* ETHSYS */
/Linux-v6.1/Documentation/devicetree/bindings/net/dsa/
Dmediatek,mt7530.yaml150 ethsys.
362 resets = <&ethsys MT2701_ETHSYS_MCM_RST>;

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