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/Linux-v5.4/Documentation/devicetree/bindings/net/
Dethernet-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ethernet PHY Generic Binding
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
[all …]
Dhisilicon-hip04-net.txt1 Hisilicon hip04 Ethernet Controller
3 * Ethernet controller node
6 - compatible: should be "hisilicon,hip04-mac".
7 - reg: address and length of the register set for the device.
8 - interrupts: interrupt for the device.
9 - port-handle: <phandle port channel>
14 - phy-mode: see ethernet.txt [1].
17 - phy-handle: see ethernet.txt [1].
19 [1] Documentation/devicetree/bindings/net/ethernet.txt
22 * Ethernet ppe node:
[all …]
Dnixge.txt1 * NI XGE Ethernet controller
4 - compatible: Should be "ni,xge-enet-3.00", but can be "ni,xge-enet-2.00" for
5 older device trees with DMA engines co-located in the address map,
7 - reg: Address and length of the register set for the device. It contains the
8 information of registers in the same order as described by reg-names.
9 - reg-names: Should contain the reg names
11 "ctrl": MDIO and PHY control and status region
12 - interrupts: Should contain tx and rx interrupt
13 - interrupt-names: Should be "rx" and "tx"
14 - phy-mode: See ethernet.txt file in the same directory.
[all …]
Dbroadcom-bcm87xx.txt1 The Broadcom BCM87XX devices are a family of 10G Ethernet PHYs. They
2 have these bindings in addition to the standard PHY bindings.
5 "ethernet-phy-ieee802.3-c45"
9 - broadcom,c45-reg-init : one of more sets of 4 cells. The first cell
18 ethernet-phy@5 {
20 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
21 interrupt-parent = <&gpio>;
28 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
Dbrcm,bcmgenet.txt1 * Broadcom BCM7xxx Ethernet Controller (GENET)
4 - compatible: should contain one of "brcm,genet-v1", "brcm,genet-v2",
5 "brcm,genet-v3", "brcm,genet-v4", "brcm,genet-v5".
6 - reg: address and length of the register set for the device
7 - interrupts and/or interrupts-extended: must be two cells, the first cell
10 optional third interrupt cell for Wake-on-LAN can be specified.
11 See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
13 - phy-mode: see ethernet.txt file in the same directory
14 - #address-cells: should be 1
15 - #size-cells: should be 1
[all …]
Dmdio-mux-mmioreg.txt1 Properties for an MDIO bus multiplexer controlled by a memory-mapped device
3 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
4 like an FPGA, is used to control which child bus is connected. The mdio-mux
5 node must be a child of the memory-mapped device. The driver currently only
6 supports devices with 8, 16 or 32-bit registers.
10 - compatible : string, must contain "mdio-mux-mmioreg"
12 - reg : integer, contains the offset of the register that controls the bus
16 - mux-mask : integer, contains an eight-bit mask that specifies which
18 'reg' property of each child mdio-mux node must be constrained by
23 The FPGA node defines a memory-mapped FPGA with a register space of 0x30 bytes.
[all …]
Dsocionext-netsec.txt1 * Socionext NetSec Ethernet Controller IP
4 - compatible: Should be "socionext,synquacer-netsec"
5 - reg: Address and length of the control register area, followed by the
8 - interrupts: Should contain ethernet controller interrupt
9 - clocks: phandle to the PHY reference clock
10 - clock-names: Should be "phy_ref_clk"
11 - phy-mode: See ethernet.txt file in the same directory
12 - phy-handle: See ethernet.txt in the same directory.
14 - mdio device tree subnode: When the Netsec has a phy connected to its local
18 - #address-cells: Must be <1>.
[all …]
/Linux-v5.4/arch/arm/boot/dts/
Dorion5x-netgear-wnr854t.dts9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include "orion5x-mv88f5181.dtsi"
16 model = "Netgear WNR854-t";
17 compatible = "netgear,wnr854t", "marvell,orion5x-88f5181",
29 stdout-path = "serial0:115200n8";
38 gpio-keys {
39 compatible = "gpio-keys";
40 pinctrl-0 = <&pmx_reset_button>;
[all …]
Daspeed-ast2600-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
29 ethphy1: ethernet-phy@0 {
30 compatible = "ethernet-phy-ieee802.3-c22";
38 ethphy2: ethernet-phy@0 {
39 compatible = "ethernet-phy-ieee802.3-c22";
47 ethphy3: ethernet-phy@0 {
48 compatible = "ethernet-phy-ieee802.3-c22";
56 phy-mode = "rgmii";
[all …]
Dkirkwood-guruplug-server-plus.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include "kirkwood-6281.dtsi"
9 …compatible = "globalscale,guruplug-server-plus", "globalscale,guruplug", "marvell,kirkwood-88f6281…
18 stdout-path = &uart0;
22 pinctrl: pin-controller@10000 {
23 pmx_led_health_r: pmx-led-health-r {
27 pmx_led_health_g: pmx-led-health-g {
31 pmx_led_wmode_r: pmx-led-wmode-r {
35 pmx_led_wmode_g: pmx-led-wmode-g {
[all …]
Dmoxart-uc7112lx.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* moxart-uc7112lx.dts - Device Tree file for MOXA UC-7112-LX
7 /dts-v1/;
11 model = "MOXA UC-7112-LX";
12 compatible = "moxa,moxart-uc-7112-lx", "moxa,moxart";
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <12000000>;
28 compatible = "numonyx,js28f128", "cfi-flash";
30 bank-width = <2>;
[all …]
Dkeystone-k2e-evm.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
7 /dts-v1/;
10 #include "keystone-k2e.dtsi"
13 compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone";
16 reserved-memory {
17 #address-cells = <2>;
18 #size-cells = <2>;
21 dsp_common_memory: dsp-common-memory@81f800000 {
22 compatible = "shared-dma-pool";
[all …]
Dkeystone-k2l-evm.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/
7 /dts-v1/;
10 #include "keystone-k2l.dtsi"
13 compatible = "ti,k2l-evm", "ti,k2l", "ti,keystone";
16 reserved-memory {
17 #address-cells = <2>;
18 #size-cells = <2>;
21 dsp_common_memory: dsp-common-memory@81f800000 {
22 compatible = "shared-dma-pool";
[all …]
Dtango4-vantage-1172.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tango4-smp8758.dtsi"
7 model = "Sigma Designs SMP8758 Vantage-1172 Rev E1";
8 compatible = "sigma,vantage-1172", "sigma,smp8758", "sigma,tango4";
21 stdout-path = "serial:115200n8";
26 phy-connection-type = "rgmii-id";
27 phy-handle = <&eth0_phy>;
28 #address-cells = <1>;
29 #size-cells = <0>;
[all …]
Dartpec6-devboard.dts2 * Axis ARTPEC-6 development board.
9 /dts-v1/;
13 model = "ARTPEC-6 development board";
14 compatible = "axis,artpec6-dev-board", "axis,artpec6";
24 stdout-path = "serial3:115200n8";
53 &ethernet {
56 phy-handle = <&phy1>;
57 phy-mode = "gmii";
60 #address-cells = <0x1>;
61 #size-cells = <0x0>;
[all …]
/Linux-v5.4/arch/mips/boot/dts/cavium-octeon/
Dubnt_e100.dts1 // SPDX-License-Identifier: GPL-2.0-only
15 phy5: ethernet-phy@5 {
17 compatible = "ethernet-phy-ieee802.3-c22";
19 phy6: ethernet-phy@6 {
21 compatible = "ethernet-phy-ieee802.3-c22";
23 phy7: ethernet-phy@7 {
25 compatible = "ethernet-phy-ieee802.3-c22";
31 ethernet@0 {
32 phy-handle = <&phy7>;
33 rx-delay = <0>;
[all …]
Ddlink_dsr-500n-1000n.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device tree source for D-Link DSR-500N/1000N (common parts).
13 phy8: ethernet-phy@8 {
15 compatible = "ethernet-phy-ieee802.3-c22";
21 ethernet@0 {
22 fixed-link {
24 full-duplex;
27 ethernet@1 {
28 fixed-link {
30 full-duplex;
[all …]
/Linux-v5.4/arch/powerpc/boot/dts/fsl/
Dt4240qds.dts4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
35 /include/ "t4240si-pre.dtsi"
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
89 #address-cells = <1>;
90 #size-cells = <1>;
91 compatible = "cfi-flash";
94 bank-width = <2>;
95 device-width = <1>;
[all …]
Dt2080rdb.dts2 * T2080PCIe-RDB Board Device Tree Source
4 * Copyright 2014 - 2015 Freescale Semiconductor Inc.
35 /include/ "t208xsi-pre.dtsi"
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
59 ethernet@e0000 {
60 phy-handle = <&xg_aq1202_phy3>;
61 phy-connection-type = "xgmii";
64 ethernet@e2000 {
[all …]
Db4860qds.dts4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
35 /include/ "b4860si-pre.dtsi"
50 board-control@3,0 {
51 compatible = "fsl,b4860qds-fpga", "fsl,fpga-qixis";
57 ethernet@e8000 {
58 phy-handle = <&phy_sgmii_1e>;
59 phy-connection-type = "sgmii";
62 ethernet@ea000 {
63 phy-handle = <&phy_sgmii_1f>;
64 phy-connection-type = "sgmii";
[all …]
Dt1024rdb.dts35 /include/ "t102xsi-pre.dtsi"
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
48 reserved-memory {
49 #address-cells = <2>;
50 #size-cells = <2>;
53 bman_fbpr: bman-fbpr {
58 qman_fqd: qman-fqd {
63 qman_pfdr: qman-pfdr {
[all …]
Dp4080ds.dts4 * Copyright 2009 - 2015 Freescale Semiconductor Inc.
35 /include/ "p4080si-pre.dtsi"
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
62 reserved-memory {
63 #address-cells = <2>;
64 #size-cells = <2>;
67 bman_fbpr: bman-fbpr {
71 qman_fqd: qman-fqd {
[all …]
/Linux-v5.4/arch/arm64/boot/dts/marvell/
Darmada-8040-mcbin.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "armada-8040-mcbin.dtsi"
11 model = "Marvell 8040 MACCHIATOBin Double-shot";
12 compatible = "marvell,armada8040-mcbin-doubleshot",
13 "marvell,armada8040-mcbin", "marvell,armada8040",
14 "marvell,armada-ap806-quad", "marvell,armada-ap806";
20 phy0: ethernet-phy@0 {
21 compatible = "ethernet-phy-ieee802.3-c45";
26 phy8: ethernet-phy@8 {
27 compatible = "ethernet-phy-ieee802.3-c45";
[all …]
/Linux-v5.4/drivers/of/
Dof_mdio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OF helpers for the MDIO (Ethernet PHY) API
7 * This file provides helper functions for extracting PHY device information
15 #include <linux/phy.h>
28 /* Extract the clause 22 phy ID from the compatible string of the form
29 * ethernet-phy-idAAAA.BBBB */
37 if (sscanf(cp, "ethernet-phy-id%4x.%4x", &upper, &lower) == 2) { in of_get_phy_id()
42 return -EINVAL; in of_get_phy_id()
48 struct phy_device *phy; in of_mdiobus_register_phy() local
54 "ethernet-phy-ieee802.3-c45"); in of_mdiobus_register_phy()
[all …]
/Linux-v5.4/arch/arm64/boot/dts/freescale/
Dimx8qxp-mek.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
12 compatible = "fsl,imx8qxp-mek", "fsl,imx8qxp";
15 stdout-path = &adma_lpuart0;
23 reg_usdhc2_vmmc: usdhc2-vmmc {
24 compatible = "regulator-fixed";
25 regulator-name = "SD1_SPWR";
26 regulator-min-microvolt = <3000000>;
27 regulator-max-microvolt = <3000000>;
29 enable-active-high;
[all …]

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