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/Linux-v5.10/drivers/nvmem/
Dsprd-efuse.c39 * The Spreadtrum AP efuse contains 2 parts: normal efuse and secure efuse,
40 * and we can only access the normal efuse in kernel. So define the normal
52 * when reading or writing data to efuse memory, the controller can save double
80 * efuse controller, so we need one hardware spinlock to synchronize between
83 static int sprd_efuse_lock(struct sprd_efuse *efuse) in sprd_efuse_lock() argument
87 mutex_lock(&efuse->mutex); in sprd_efuse_lock()
89 ret = hwspin_lock_timeout_raw(efuse->hwlock, in sprd_efuse_lock()
92 dev_err(efuse->dev, "timeout get the hwspinlock\n"); in sprd_efuse_lock()
93 mutex_unlock(&efuse->mutex); in sprd_efuse_lock()
100 static void sprd_efuse_unlock(struct sprd_efuse *efuse) in sprd_efuse_unlock() argument
[all …]
Dmeson-mx-efuse.c3 * Amlogic Meson6, Meson8 and Meson8b eFuse Driver
51 static void meson_mx_efuse_mask_bits(struct meson_mx_efuse *efuse, u32 reg, in meson_mx_efuse_mask_bits() argument
56 data = readl(efuse->base + reg); in meson_mx_efuse_mask_bits()
60 writel(data, efuse->base + reg); in meson_mx_efuse_mask_bits()
63 static int meson_mx_efuse_hw_enable(struct meson_mx_efuse *efuse) in meson_mx_efuse_hw_enable() argument
67 err = clk_prepare_enable(efuse->core_clk); in meson_mx_efuse_hw_enable()
71 /* power up the efuse */ in meson_mx_efuse_hw_enable()
72 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1, in meson_mx_efuse_hw_enable()
75 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL4, in meson_mx_efuse_hw_enable()
81 static void meson_mx_efuse_hw_disable(struct meson_mx_efuse *efuse) in meson_mx_efuse_hw_disable() argument
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Dsc27xx-efuse.c17 /* Efuse controller registers definition */
81 * efuse controller, so we need one hardware spinlock to synchronize between
84 static int sc27xx_efuse_lock(struct sc27xx_efuse *efuse) in sc27xx_efuse_lock() argument
88 mutex_lock(&efuse->mutex); in sc27xx_efuse_lock()
90 ret = hwspin_lock_timeout_raw(efuse->hwlock, in sc27xx_efuse_lock()
93 dev_err(efuse->dev, "timeout to get the hwspinlock\n"); in sc27xx_efuse_lock()
94 mutex_unlock(&efuse->mutex); in sc27xx_efuse_lock()
101 static void sc27xx_efuse_unlock(struct sc27xx_efuse *efuse) in sc27xx_efuse_unlock() argument
103 hwspin_unlock_raw(efuse->hwlock); in sc27xx_efuse_unlock()
104 mutex_unlock(&efuse->mutex); in sc27xx_efuse_unlock()
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Drockchip-efuse.c3 * Rockchip eFuse Driver
58 struct rockchip_efuse_chip *efuse = context; in rockchip_rk3288_efuse_read() local
62 ret = clk_prepare_enable(efuse->clk); in rockchip_rk3288_efuse_read()
64 dev_err(efuse->dev, "failed to prepare/enable efuse clk\n"); in rockchip_rk3288_efuse_read()
68 writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL); in rockchip_rk3288_efuse_read()
71 writel(readl(efuse->base + REG_EFUSE_CTRL) & in rockchip_rk3288_efuse_read()
73 efuse->base + REG_EFUSE_CTRL); in rockchip_rk3288_efuse_read()
74 writel(readl(efuse->base + REG_EFUSE_CTRL) | in rockchip_rk3288_efuse_read()
76 efuse->base + REG_EFUSE_CTRL); in rockchip_rk3288_efuse_read()
78 writel(readl(efuse->base + REG_EFUSE_CTRL) | in rockchip_rk3288_efuse_read()
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Djz4780-efuse.c3 * JZ4780 EFUSE Memory Support driver
10 * Currently supports JZ4780 efuse which has 8K programmable bit.
11 * Efuse is separated into seven segments as below:
72 struct jz4780_efuse *efuse = context; in jz4780_efuse_read() local
87 regmap_update_bits(efuse->map, JZ_EFUCTRL, in jz4780_efuse_read()
94 ret = regmap_read_poll_timeout(efuse->map, JZ_EFUSTATE, in jz4780_efuse_read()
99 dev_err(efuse->dev, "Time out while reading efuse data"); in jz4780_efuse_read()
103 ret = regmap_bulk_read(efuse->map, JZ_EFUDATA(0), in jz4780_efuse_read()
119 .name = "jz4780-efuse",
142 struct jz4780_efuse *efuse; in jz4780_efuse_probe() local
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DMakefile19 nvmem_jz4780_efuse-y := jz4780-efuse.o
26 obj-$(CONFIG_MTK_EFUSE) += nvmem_mtk-efuse.o
27 nvmem_mtk-efuse-y := mtk-efuse.o
33 nvmem_rockchip_efuse-y := rockchip-efuse.o
40 obj-$(CONFIG_UNIPHIER_EFUSE) += nvmem-uniphier-efuse.o
41 nvmem-uniphier-efuse-y := uniphier-efuse.o
45 nvmem_meson_efuse-y := meson-efuse.o
47 nvmem_meson_mx_efuse-y := meson-mx-efuse.o
52 obj-$(CONFIG_SC27XX_EFUSE) += nvmem-sc27xx-efuse.o
53 nvmem-sc27xx-efuse-y := sc27xx-efuse.o
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DKconfig56 tristate "JZ4780 EFUSE Memory Support"
62 Say Y here to include support for JZ4780 efuse memory found on
100 tristate "Mediatek SoCs EFUSE support"
108 will be called efuse-mtk.
130 tristate "Rockchip eFuse Support"
135 from eFuse, such as cpu-leakage.
184 tristate "UniPhier SoCs eFuse support"
189 from eFuse.
192 will be called nvmem-uniphier-efuse.
206 tristate "Amlogic Meson GX eFuse Support"
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/Linux-v5.10/Documentation/devicetree/bindings/nvmem/
Drockchip-efuse.yaml4 $id: http://devicetree.org/schemas/nvmem/rockchip-efuse.yaml#
7 title: Rockchip eFuse device tree bindings
18 - rockchip,rk3066a-efuse
19 - rockchip,rk3188-efuse
20 - rockchip,rk3228-efuse
21 - rockchip,rk3288-efuse
22 - rockchip,rk3328-efuse
23 - rockchip,rk3368-efuse
24 - rockchip,rk3399-efuse
27 - rockchip,rockchip-efuse
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Dmtk-efuse.txt1 = Mediatek MTK-EFUSE device tree bindings =
3 This binding is intended to represent MTK-EFUSE which is found in most Mediatek SOCs.
7 "mediatek,mt7622-efuse", "mediatek,efuse": for MT7622
8 "mediatek,mt7623-efuse", "mediatek,efuse": for MT7623
9 "mediatek,mt8173-efuse" or "mediatek,efuse": for MT8173
13 Are child nodes of MTK-EFUSE, bindings of which as described in
18 efuse: efuse@10206000 {
19 compatible = "mediatek,mt8173-efuse";
Dsc27xx-efuse.txt1 = Spreadtrum SC27XX PMIC eFuse device tree bindings =
5 "sprd,sc2720-efuse"
6 "sprd,sc2721-efuse"
7 "sprd,sc2723-efuse"
8 "sprd,sc2730-efuse"
9 "sprd,sc2731-efuse"
10 - reg: Specify the address offset of efuse controller.
14 Are child nodes of eFuse, bindings of which as described in
29 efuse@380 {
30 compatible = "sprd,sc2731-efuse";
Damlogic-meson-mx-efuse.txt1 Amlogic Meson6/Meson8/Meson8b efuse
5 - "amlogic,meson6-efuse"
6 - "amlogic,meson8-efuse"
7 - "amlogic,meson8b-efuse"
8 - reg: base address and size of the efuse registers
9 - clocks: a reference to the efuse core gate clock
17 efuse: nvmem@0 {
18 compatible = "amlogic,meson8-efuse";
Duniphier-efuse.txt1 = UniPhier eFuse device tree bindings =
3 This UniPhier eFuse must be under soc-glue.
6 - compatible: should be "socionext,uniphier-efuse"
10 Are child nodes of efuse, bindings of which as described in
22 efuse@100 {
23 compatible = "socionext,uniphier-efuse";
27 efuse@200 {
28 compatible = "socionext,uniphier-efuse";
Damlogic-efuse.txt1 = Amlogic Meson GX eFuse device tree bindings =
4 - compatible: should be "amlogic,meson-gxbb-efuse"
5 - clocks: phandle to the efuse peripheral clock provided by the
10 Are child nodes of eFuse, bindings of which as described in
15 efuse: efuse {
16 compatible = "amlogic,meson-gxbb-efuse";
Dingenic,jz4780-efuse.yaml4 $id: http://devicetree.org/schemas/nvmem/ingenic,jz4780-efuse.yaml#
7 title: Ingenic JZ EFUSE driver bindings
18 - ingenic,jz4780-efuse
24 # Handle for the ahb for the efuse.
38 efuse@134100d0 {
39 compatible = "ingenic,jz4780-efuse";
Dsprd-efuse.txt1 = Spreadtrum eFuse device tree bindings =
4 - compatible: Should be "sprd,ums312-efuse".
5 - reg: Specify the address offset of efuse controller.
11 Are child nodes of eFuse, bindings of which as described in
16 ap_efuse: efuse@32240000 {
17 compatible = "sprd,ums312-efuse";
/Linux-v5.10/Documentation/devicetree/bindings/regulator/
Dti-abb-regulator.txt35 efuse: (see Optional properties)
36 RBB enable efuse Mask: (See Optional properties)
37 FBB enable efuse Mask: (See Optional properties)
38 Vset value efuse Mask: (See Optional properties)
47 - "efuse-address" - Contains efuse base address used to pick up ABB info.
49 "efuse-address" is required for this.
55 efuse: Mandatory if 'efuse-address' register is defined. Provides offset
56 from efuse-address to pick up ABB characteristics. Set to 0 if
57 'efuse-address' is not defined.
58 RBB enable efuse Mask: Optional if 'efuse-address' register is defined.
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/Linux-v5.10/Documentation/devicetree/bindings/fuse/
Dnvidia,tegra20-fuse.txt4 - compatible : For Tegra20, must contain "nvidia,tegra20-efuse". For Tegra30,
5 must contain "nvidia,tegra30-efuse". For Tegra114, must contain
6 "nvidia,tegra114-efuse". For Tegra124, must contain "nvidia,tegra124-efuse".
7 For Tegra132 must contain "nvidia,tegra132-efuse", "nvidia,tegra124-efuse".
8 For Tegra210 must contain "nvidia,tegra210-efuse". For Tegra186 must contain
9 "nvidia,tegra186-efuse". For Tegra194 must contain "nvidia,tegra194-efuse".
10 For Tegra234 must contain "nvidia,tegra234-efuse".
12 nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data
15 nvidia,tegra30-efuse, nvidia,tegra114-efuse and nvidia,tegra124-efuse:
16 The differences between these SoCs are the size of the efuse array,
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/Linux-v5.10/drivers/cpufreq/
Dti-cpufreq.c49 unsigned long efuse);
67 unsigned long efuse) in amx3_efuse_xlate() argument
69 if (!efuse) in amx3_efuse_xlate()
70 efuse = opp_data->soc_data->efuse_fallback; in amx3_efuse_xlate()
72 return ~efuse; in amx3_efuse_xlate()
76 unsigned long efuse) in dra7_efuse_xlate() argument
81 * The efuse on dra7 and am57 parts contains a specific in dra7_efuse_xlate()
85 switch (efuse) { in dra7_efuse_xlate()
102 unsigned long efuse) in omap3_efuse_xlate() argument
105 return BIT(efuse); in omap3_efuse_xlate()
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/Linux-v5.10/drivers/net/wireless/realtek/rtw88/
Defuse.c8 #include "efuse.h"
31 /* efuse header format
43 u32 physical_size = rtwdev->efuse.physical_size; in rtw_dump_logical_efuse_map()
44 u32 protect_size = rtwdev->efuse.protect_size; in rtw_dump_logical_efuse_map()
45 u32 logical_size = rtwdev->efuse.logical_size; in rtw_dump_logical_efuse_map()
90 u32 size = rtwdev->efuse.physical_size; in rtw_dump_physical_efuse_map()
149 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_parse_efuse_map() local
150 u32 phy_size = efuse->physical_size; in rtw_parse_efuse_map()
151 u32 log_size = efuse->logical_size; in rtw_parse_efuse_map()
165 rtw_err(rtwdev, "failed to dump efuse physical map\n"); in rtw_parse_efuse_map()
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Dmain.c14 #include "efuse.h"
700 WARN(1, "invalid hw configuration from efuse\n"); in rtw_hw_config_rf_ant_num()
897 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_update_sta_info() local
926 if (efuse->hw_cap.nss == 1) in rtw_update_sta_info()
1077 wifi_only = !rtwdev->efuse.btcoex; in rtw_power_on()
1142 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_init_ht_cap() local
1153 if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40)) in rtw_init_ht_cap()
1160 if (efuse->hw_cap.nss > 1) { in rtw_init_ht_cap()
1176 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_init_vht_cap() local
1180 if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE && in rtw_init_vht_cap()
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/Linux-v5.10/drivers/net/wireless/realtek/rtl8xxxu/
Drtl8xxxu_8723a.c134 struct rtl8723au_efuse *efuse = &priv->efuse_wifi.efuse8723; in rtl8723au_parse_efuse() local
136 if (efuse->rtl_id != cpu_to_le16(0x8129)) in rtl8723au_parse_efuse()
139 ether_addr_copy(priv->mac_addr, efuse->mac_addr); in rtl8723au_parse_efuse()
142 efuse->cck_tx_power_index_A, in rtl8723au_parse_efuse()
143 sizeof(efuse->cck_tx_power_index_A)); in rtl8723au_parse_efuse()
145 efuse->cck_tx_power_index_B, in rtl8723au_parse_efuse()
146 sizeof(efuse->cck_tx_power_index_B)); in rtl8723au_parse_efuse()
149 efuse->ht40_1s_tx_power_index_A, in rtl8723au_parse_efuse()
150 sizeof(efuse->ht40_1s_tx_power_index_A)); in rtl8723au_parse_efuse()
152 efuse->ht40_1s_tx_power_index_B, in rtl8723au_parse_efuse()
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/Linux-v5.10/Documentation/devicetree/bindings/opp/
Dti-omap5-opp-supply.txt3 OMAP5, DRA7, and AM57 family of SoCs have Class0 AVS eFuse registers which
26 "ti,omap5-opp-supply" - OMAP5+ optimized voltages in efuse(class0)VDD
28 "ti,omap5-core-opp-supply" - OMAP5+ optimized voltages in efuse(class0) VDD
30 - reg: Address and length of the efuse register set for the device (mandatory
32 - ti,efuse-settings: An array of u32 tuple items providing information about
33 optimized efuse configuration. Each item consists of the following:
35 efuse_offseet: efuse offset from reg where the optimized voltage is stored.
56 ti,efuse-settings = <
/Linux-v5.10/drivers/net/wireless/mediatek/mt76/mt7603/
Deeprom.c67 mt7603_has_cal_free_data(struct mt7603_dev *dev, u8 *efuse) in mt7603_has_cal_free_data() argument
69 if (!efuse[MT_EE_TEMP_SENSOR_CAL]) in mt7603_has_cal_free_data()
72 if (get_unaligned_le16(efuse + MT_EE_TX_POWER_0_START_2G) == 0) in mt7603_has_cal_free_data()
75 if (get_unaligned_le16(efuse + MT_EE_TX_POWER_1_START_2G) == 0) in mt7603_has_cal_free_data()
78 if (!efuse[MT_EE_CP_FT_VERSION]) in mt7603_has_cal_free_data()
81 if (!efuse[MT_EE_XTAL_FREQ_OFFSET]) in mt7603_has_cal_free_data()
84 if (!efuse[MT_EE_XTAL_WF_RFCAL]) in mt7603_has_cal_free_data()
91 mt7603_apply_cal_free_data(struct mt7603_dev *dev, u8 *efuse) in mt7603_apply_cal_free_data() argument
112 if (!mt7603_has_cal_free_data(dev, efuse)) in mt7603_apply_cal_free_data()
121 eeprom[offset] = efuse[offset]; in mt7603_apply_cal_free_data()
/Linux-v5.10/drivers/net/wireless/mediatek/mt76/mt76x2/
Deeprom.c24 mt76x2_has_cal_free_data(struct mt76x02_dev *dev, u8 *efuse) in mt76x2_has_cal_free_data() argument
26 u16 *efuse_w = (u16 *)efuse; in mt76x2_has_cal_free_data()
50 mt76x2_apply_cal_free_data(struct mt76x02_dev *dev, u8 *efuse) in mt76x2_apply_cal_free_data() argument
94 if (!mt76x2_has_cal_free_data(dev, efuse)) in mt76x2_apply_cal_free_data()
100 eeprom[offset] = efuse[offset]; in mt76x2_apply_cal_free_data()
103 if (!(efuse[MT_EE_TX_POWER_0_START_5G] | in mt76x2_apply_cal_free_data()
104 efuse[MT_EE_TX_POWER_0_START_5G + 1])) in mt76x2_apply_cal_free_data()
106 if (!(efuse[MT_EE_TX_POWER_1_START_5G] | in mt76x2_apply_cal_free_data()
107 efuse[MT_EE_TX_POWER_1_START_5G + 1])) in mt76x2_apply_cal_free_data()
110 val = get_unaligned_le16(efuse + MT_EE_BT_RCAL_RESULT); in mt76x2_apply_cal_free_data()
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/edac/
Dapm-xgene-edac.txt18 - regmap-efuse : Regmap of the PMD efuse resource.
66 efuse: efuse@1054a000 {
67 compatible = "apm,xgene-efuse", "syscon";
84 regmap-efuse = <&efuse>;

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