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/Linux-v5.15/Documentation/devicetree/bindings/phy/
Dmediatek,xsphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek XS-PHY Controller Device Tree Bindings
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 The XS-PHY controller supports physical layer functionality for USB3.1
18 ----------------------------------
45 pattern: "^xs-phy@[0-9a-f]+$"
49 - enum:
50 - mediatek,mt3611-xsphy
[all …]
/Linux-v5.15/drivers/phy/mediatek/
Dphy-mtk-xsphy.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <dt-bindings/phy/phy.h>
119 void __iomem *pbase = inst->port_base; in u2_phy_slew_rate_calibrate()
125 if (inst->eye_src) in u2_phy_slew_rate_calibrate()
168 tmp = xsphy->src_ref_clk * xsphy->src_coef; in u2_phy_slew_rate_calibrate()
175 dev_dbg(xsphy->dev, "phy.%d, fm_out:%d, calib:%d (clk:%d, coef:%d)\n", in u2_phy_slew_rate_calibrate()
176 inst->index, fm_out, calib_val, in u2_phy_slew_rate_calibrate()
177 xsphy->src_ref_clk, xsphy->src_coef); in u2_phy_slew_rate_calibrate()
194 void __iomem *pbase = inst->port_base; in u2_phy_instance_init()
210 void __iomem *pbase = inst->port_base; in u2_phy_instance_power_on()
[all …]
/Linux-v5.15/arch/arm64/boot/dts/ti/
Dk3-j721e-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
[all …]
Dk3-j7200-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
[all …]
Dk3-am64-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
[all …]
/Linux-v5.15/drivers/crypto/cavium/nitrox/
Dnitrox_csr.h1 /* SPDX-License-Identifier: GPL-2.0 */
151 /* Mailbox PF->VF PF Accessible Data registers */
206 * struct ucd_core_eid_ucode_block_num - Core Eid to Ucode Blk Mapping Registers
226 * struct aqm_grp_execmsk_lo - Available AE engines for the group
243 * struct aqm_grp_execmsk_hi - Available AE engines for the group
260 * struct aqmq_drbl - AQM Queue Doorbell Counter Registers
277 * struct aqmq_qsz - AQM Queue Host Queue Size Registers
295 * struct aqmq_cmp_thr - AQM Queue Commands Completed Threshold Registers
313 * struct aqmq_cmp_cnt - AQM Queue Commands Completed Count Registers
337 * struct aqmq_en - AQM Queue Enable Registers
[all …]
/Linux-v5.15/arch/arm64/boot/dts/nvidia/
Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
7 #include <dt-bindings/power/tegra194-powergate.h>
8 #include <dt-bindings/reset/tegra194-reset.h>
9 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
10 #include <dt-bindings/memory/tegra194-mc.h>
[all …]
Dtegra132.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
13 interrupt-parent = <&lic>;
[all …]
Dtegra186.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
[all …]
Dtegra210.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra210-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra210-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/reset/tegra210-car.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/tegra124-soctherm.h>
10 #include <dt-bindings/soc/tegra-pmc.h>
[all …]
/Linux-v5.15/arch/arm/boot/dts/
Dtegra20.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra20-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra20-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
9 #include "tegra20-peripherals-opp.dtsi"
13 interrupt-parent = <&lic>;
14 #address-cells = <1>;
[all …]
Dtegra30.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra30-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra30-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-peripherals-opp.dtsi"
14 interrupt-parent = <&lic>;
[all …]
Dtegra124.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra124-peripherals-opp.dtsi"
[all …]
/Linux-v5.15/drivers/net/ethernet/atheros/alx/
Dhw.c58 return -ETIMEDOUT; in alx_wait_mdio_idle()
70 clk_sel = hw->link_speed != SPEED_UNKNOWN ? in alx_read_phy_core()
104 clk_sel = hw->link_speed != SPEED_UNKNOWN ? in alx_write_phy_core()
175 spin_lock(&hw->mdio_lock); in alx_read_phy_reg()
177 spin_unlock(&hw->mdio_lock); in alx_read_phy_reg()
186 spin_lock(&hw->mdio_lock); in alx_write_phy_reg()
188 spin_unlock(&hw->mdio_lock); in alx_write_phy_reg()
197 spin_lock(&hw->mdio_lock); in alx_read_phy_ext()
199 spin_unlock(&hw->mdio_lock); in alx_read_phy_ext()
208 spin_lock(&hw->mdio_lock); in alx_write_phy_ext()
[all …]
/Linux-v5.15/drivers/staging/rtl8723bs/include/
Dhal_com_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
13 #define HAL_NAV_UPPER_UNIT 128 /* micro-second */
70 #define REG_GPIO_PIN_CTRL_2 0x0060 /* RTL8723 WIFI/BT/GPS Multi-Function GPIO Pin Control. */
71 #define REG_GPIO_IO_SEL_2 0x0062 /* RTL8723 WIFI/BT/GPS Multi-Function GPIO Select. */
72 #define REG_MULTI_FUNC_CTRL 0x0068 /* RTL8723 WIFI/BT/GPS Multi-Function control source. */
82 #define REG_EFUSE_ACCESS 0x00CF /* Efuse access protection for RTL8723 */
198 /* RTL8723 series ------------------------------- */
296 /* Format for offset 540h-542h: */
303 /* |<--Setup--|--Hold------------>| */
[all …]
/Linux-v5.15/drivers/net/usb/
Dr8152.c1 // SPDX-License-Identifier: GPL-2.0-only
31 /* Information for net-next */
674 #define RTL_ADV2_5G_F_R BIT(5) /* Advertise 2.5GBASE-T fast-retrain */
721 #define EFUSE 0xcfdb macro
757 #define size_to_mtu(s) ((s) - VLAN_ETH_HLEN - ETH_FCS_LEN)
950 * struct fw_block - block type and total length
961 * struct fw_header - header of the firmware file
1035 * struct fw_mac - a firmware block used by RTL_FW_PLA and RTL_FW_USB.
1076 * struct fw_phy_patch_key - a firmware block used by RTL_FW_PHY_START.
1091 * struct fw_phy_nc - a firmware block used by RTL_FW_PHY_NC.
[all …]
/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dsc7280.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
8 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/interconnect/qcom,sc7280.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/mailbox/qcom-ipcc.h>
13 #include <dt-bindings/power/qcom-aoss-qmp.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
15 #include <dt-bindings/reset/qcom,sdm845-aoss.h>
[all …]
Dsc7180.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,videocc-sc7180.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
15 #include <dt-bindings/interconnect/qcom,sc7180.h>
[all …]