/Linux-v5.10/arch/arm/boot/dts/ |
D | am335x-netcom-plus-2xx.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 11 /dts-v1/; 13 #include "am335x-baltos.dtsi" 14 #include "am335x-baltos-leds.dtsi" 22 pinctrl-single,pins = < 28 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* DSR */ 35 pinctrl-single,pins = < 41 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) /* DSR */ 58 pinctrl-names = "default"; [all …]
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D | am335x-baltos-ir3220.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 11 /dts-v1/; 13 #include "am335x-baltos.dtsi" 14 #include "am335x-baltos-leds.dtsi" 22 pinctrl-single,pins = < 28 pinctrl-single,pins = < 34 …3XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2[23] DSR */ 41 pinctrl-single,pins = < 47 …3XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad13.gpio1[13] DSR */ [all …]
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D | am335x-baltos-ir5221.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 11 /dts-v1/; 13 #include "am335x-baltos.dtsi" 14 #include "am335x-baltos-leds.dtsi" 22 pinctrl-single,pins = < 29 pinctrl-single,pins = < 36 pinctrl-single,pins = < 42 …3XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2[23] DSR */ 49 pinctrl-single,pins = < [all …]
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D | imx6dl-eckelmann-ci4x10.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 15 compatible = "eckelmann,imx6dl-ci4x10", "fsl,imx6dl"; 18 stdout-path = &uart3; 26 rmii_clk: clock-rmii { 28 compatible = "fixed-clock"; 29 #clock-cells = <0>; 30 clock-frequency = <50000000>; 33 reg_usb_h1_vbus: regulator-usb-h1-vbus { [all …]
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D | am335x-baltos-ir2110.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 11 /dts-v1/; 13 #include "am335x-baltos.dtsi" 14 #include "am335x-baltos-leds.dtsi" 22 pinctrl-single,pins = < 28 …3XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2[23] DSR */ 35 pinctrl-single,pins = < 42 pinctrl-names = "default"; 43 pinctrl-0 = <&uart1_pins>; [all …]
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D | at91-wb50n.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * at91-wb50n.dtsi - Device Tree include file for wb50n cpu module 12 model = "Laird Workgroup Bridge 50N - Atmel SAMA5D"; 17 stdout-path = "serial0:115200n8"; 38 clock-frequency = <32768>; 42 clock-frequency = <12000000>; 46 atmel,osc-bypass; 50 pinctrl-names = "default"; 51 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>; 52 cd-gpios = <&pioC 26 GPIO_ACTIVE_LOW>; [all …]
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D | imx6q-dhcom-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+) 8 #include <dt-bindings/pwm/pwm.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/clock/imx6qdl-clock.h> 11 #include <dt-bindings/input/input.h> 26 reg_usb_otg_vbus: regulator-usb-otg-vbus { 27 compatible = "regulator-fixed"; 28 regulator-name = "usb_otg_vbus"; 29 regulator-min-microvolt = <5000000>; 30 regulator-max-microvolt = <5000000>; [all …]
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D | gemini-dlink-dir-685.dts | 2 * Device Tree file for D-Link DIR-685 Xtreme N Storage Router 5 /dts-v1/; 8 #include <dt-bindings/input/input.h> 11 model = "D-Link DIR-685 Xtreme N Storage Router"; 12 compatible = "dlink,dir-685", "cortina,gemini"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 /* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D43 */ 24 stdout-path = "uart0:19200n8"; 28 compatible = "gpio-keys"; [all …]
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D | imx6qdl-apalis.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * Copyright 2014-2020 Toradex 8 #include <dt-bindings/gpio/gpio.h> 21 compatible = "pwm-backlight"; 22 pinctrl-names = "default"; 23 pinctrl-0 = <&pinctrl_gpio_bl_on>; 25 enable-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; 29 reg_module_3v3: regulator-module-3v3 { 30 compatible = "regulator-fixed"; 31 regulator-name = "+V3.3"; [all …]
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D | imx6qdl-colibri.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * Copyright 2014-2020 Toradex 8 #include <dt-bindings/gpio/gpio.h> 15 compatible = "pwm-backlight"; 16 pinctrl-names = "default"; 17 pinctrl-0 = <&pinctrl_gpio_bl_on>; 19 enable-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */ 23 reg_module_3v3: regulator-module-3v3 { 24 compatible = "regulator-fixed"; 25 regulator-name = "+V3.3"; [all …]
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D | imx7-colibri.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * Copyright 2016-2020 Toradex 8 compatible = "pwm-backlight"; 9 pinctrl-names = "default"; 10 pinctrl-0 = <&pinctrl_gpio_bl_on>; 12 enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; 15 reg_module_3v3: regulator-module-3v3 { 16 compatible = "regulator-fixed"; 17 regulator-name = "+V3.3"; 18 regulator-min-microvolt = <3300000>; [all …]
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D | tegra20-colibri.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 22 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 23 nvidia,hpd-gpio = 25 pll-supply = <®_1v8_avdd_hdmi_pll>; 26 vdd-supply = <®_3v3_avdd_hdmi>; 31 pinctrl-names = "default"; 32 pinctrl-0 = <&state_default>; 35 /* Analogue Audio AC97 to WM9712 (On-module) */ 36 audio-refclk { 51 * (All on-module), SODIMM Pin 45 Wakeup [all …]
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/Linux-v5.10/Documentation/devicetree/bindings/serial/ |
D | cirrus,clps711x-uart.txt | 4 - compatible: Should be "cirrus,ep7209-uart". 5 - reg: Address and length of the register set for the device. 6 - interrupts: Should contain UART TX and RX interrupt. 7 - clocks: Should contain UART core clock number. 8 - syscon: Phandle to SYSCON node, which contain UART control bits. 11 - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD 23 compatible = "cirrus,ep7312-uart","cirrus,ep7209-uart"; 28 cts-gpios = <&sysgpio 0 GPIO_ACTIVE_LOW>; 29 dsr-gpios = <&sysgpio 1 GPIO_ACTIVE_LOW>; 30 dcd-gpios = <&sysgpio 2 GPIO_ACTIVE_LOW>;
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D | serial.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 10 - Rob Herring <robh@kernel.org> 11 - Greg Kroah-Hartman <gregkh@linuxfoundation.org> 19 where N is the port number (non-negative decimal integer) as printed on the 26 cts-gpios: 32 dcd-gpios: 38 dsr-gpios: 42 the UART's DSR line. [all …]
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D | 8250.yaml | 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - devicetree@vger.kernel.org 13 - $ref: /schemas/serial.yaml# 14 - if: 16 - aspeed,sirq-polarity-sense 20 const: aspeed,ast2500-vuart 21 - if: 24 const: mrvl,mmp-uart 27 reg-shift: [all …]
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D | fsl-mxs-auart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/serial/fsl-mxs-auart.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Fabio Estevam <fabio.estevam@nxp.com> 13 - $ref: "serial.yaml" 18 - fsl,imx23-auart 19 - fsl,imx28-auart 20 - alphascale,asm9260-auart 30 - description: DMA controller phandle and request line for RX [all …]
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/Linux-v5.10/arch/mips/boot/dts/cavium-octeon/ |
D | dlink_dsr-500n.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Device tree source for D-Link DSR-500N. 8 /include/ "dlink_dsr-500n-1000n.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 12 model = "dlink,dsr-500n"; 13 compatible = "dlink,dsr-500n", "cavium,octeon-3860"; 17 clock-frequency = <300000000>; 22 compatible = "gpio-leds"; 25 gpios = <&gpio 9 GPIO_ACTIVE_LOW>; 29 gpios = <&gpio 11 GPIO_ACTIVE_LOW>; [all …]
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D | dlink_dsr-1000n.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Device tree source for D-Link DSR-1000N. 8 /include/ "dlink_dsr-500n-1000n.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 12 model = "dlink,dsr-1000n"; 16 clock-frequency = <500000000>; 21 compatible = "gpio-leds"; 25 gpios = <&gpio 9 GPIO_ACTIVE_LOW>; 30 gpios = <&gpio 10 GPIO_ACTIVE_LOW>; 35 gpios = <&gpio 11 GPIO_ACTIVE_LOW>; [all …]
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/Linux-v5.10/Documentation/devicetree/bindings/mfd/ |
D | atmel-usart.txt | 4 - compatible: Should be one of the following: 5 - "atmel,at91rm9200-usart" 6 - "atmel,at91sam9260-usart" 7 - "microchip,sam9x60-usart" 8 - "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart" 9 - "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart" 10 - "microchip,sam9x60-dbgu", "microchip,sam9x60-usart" 11 - reg: Should contain registers location and length 12 - interrupts: Should contain interrupt 13 - clock-names: tuple listing input clock names. [all …]
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/Linux-v5.10/drivers/tty/serial/ |
D | serial_mctrl_gpio.c | 1 // SPDX-License-Identifier: GPL-2.0+ 33 { "dsr", TIOCM_DSR, GPIOD_IN, }, 45 void mctrl_gpio_set(struct mctrl_gpios *gpios, unsigned int mctrl) in mctrl_gpio_set() argument 52 if (gpios == NULL) in mctrl_gpio_set() 56 if (gpios->gpio[i] && mctrl_gpio_flags_is_dir_out(i)) { in mctrl_gpio_set() 57 desc_array[count] = gpios->gpio[i]; in mctrl_gpio_set() 66 struct gpio_desc *mctrl_gpio_to_gpiod(struct mctrl_gpios *gpios, in mctrl_gpio_to_gpiod() argument 69 if (gpios == NULL) in mctrl_gpio_to_gpiod() 72 return gpios->gpio[gidx]; in mctrl_gpio_to_gpiod() 76 unsigned int mctrl_gpio_get(struct mctrl_gpios *gpios, unsigned int *mctrl) in mctrl_gpio_get() argument [all …]
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D | sa1100.c | 1 // SPDX-License-Identifier: GPL-2.0+ 15 #include <linux/platform_data/sa11x0-serial.h> 29 /* We've been assigned a range on the "Low-density serial ports" major */ 45 #define UART_GET_UTCR0(sport) __raw_readl((sport)->port.membase + UTCR0) 46 #define UART_GET_UTCR1(sport) __raw_readl((sport)->port.membase + UTCR1) 47 #define UART_GET_UTCR2(sport) __raw_readl((sport)->port.membase + UTCR2) 48 #define UART_GET_UTCR3(sport) __raw_readl((sport)->port.membase + UTCR3) 49 #define UART_GET_UTSR0(sport) __raw_readl((sport)->port.membase + UTSR0) 50 #define UART_GET_UTSR1(sport) __raw_readl((sport)->port.membase + UTSR1) 51 #define UART_GET_CHAR(sport) __raw_readl((sport)->port.membase + UTDR) [all …]
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/Linux-v5.10/Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
D | serial.txt | 4 - fsl,cpm1-smc-uart 5 - fsl,cpm2-smc-uart 6 - fsl,cpm1-scc-uart 7 - fsl,cpm2-scc-uart 8 - fsl,qe-uart 10 Modem control lines connected to GPIO controllers are listed in the gpios 11 property as described in booting-without-of.txt, section IX.1 in the following 14 CTS, RTS, DCD, DSR, DTR, and RI. 16 The gpios property is optional and can be left out when control lines are 23 compatible = "fsl,mpc8272-scc-uart", [all …]
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/Linux-v5.10/Documentation/devicetree/bindings/mmc/ |
D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ulf Hansson <ulf.hansson@linaro.org> 25 "#address-cells": 30 "#size-cells": 37 broken-cd: 42 cd-gpios: 46 non-removable: [all …]
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/Linux-v5.10/Documentation/driver-api/serial/ |
D | driver.rst | 10 The reference implementation is contained within amba-pl011.c. 15 -------------------------------- 25 --------------- 38 ------- 41 necessary locking using port->lock. There are some exceptions (which 44 There are two locks. A per-port spinlock, and an overall semaphore. 46 From the core driver perspective, the port->lock locks the following 49 port->mctrl 50 port->icount 51 port->state->xmit.head (circ_buf->head) [all …]
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/Linux-v5.10/drivers/mmc/core/ |
D | host.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * Copyright (C) 2007-2008 Pierre Ossman 25 #include <linux/mmc/slot-gpio.h> 29 #include "slot-gpio.h" 40 wakeup_source_unregister(host->ws); in mmc_host_classdev_release() 41 ida_simple_remove(&mmc_host_ida, host->index); in mmc_host_classdev_release() 62 host->can_retune = 1; in mmc_retune_enable() 63 if (host->retune_period) in mmc_retune_enable() 64 mod_timer(&host->retune_timer, in mmc_retune_enable() 65 jiffies + host->retune_period * HZ); in mmc_retune_enable() [all …]
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