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Searched +full:dp83867 +full:- +full:rxctrl +full:- +full:strap +full:- +full:quirk (Results 1 – 17 of 17) sorted by relevance

/Linux-v6.1/arch/arm/boot/dts/
Ddra72-evm-revc.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
5 #include "dra72-evm-common.dtsi"
6 #include "dra72x-mmc-iodelay.dtsi"
7 #include <dt-bindings/net/ti-dp83867.h>
17 reserved-memory {
18 #address-cells = <2>;
19 #size-cells = <2>;
23 compatible = "shared-dma-pool";
30 compatible = "shared-dma-pool";
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Ddra71-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
7 #include "dra7-mmc-iodelay.dtsi"
8 #include "dra72x-mmc-iodelay.dtsi"
9 #include <dt-bindings/net/ti-dp83867.h>
12 compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7";
20 reserved-memory {
21 #address-cells = <2>;
22 #size-cells = <2>;
25 ipu2_memory_region: ipu2-memory@95800000 {
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Ddra76-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "dra7-evm-common.dtsi"
9 #include "dra76x-mmc-iodelay.dtsi"
10 #include <dt-bindings/net/ti-dp83867.h>
14 compatible = "ti,dra76-evm", "ti,dra762", "ti,dra7";
28 reserved-memory {
29 #address-cells = <2>;
30 #size-cells = <2>;
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Dkeystone-k2g-ice.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
7 /dts-v1/;
9 #include "keystone-k2g.dtsi"
10 #include <dt-bindings/net/ti-dp83867.h>
13 compatible = "ti,k2g-ice", "ti,k2g", "ti,keystone";
21 reserved-memory {
22 #address-cells = <2>;
23 #size-cells = <2>;
26 dsp_common_memory: dsp-common-memory@81f800000 {
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/Linux-v6.1/arch/arm64/boot/dts/xilinx/
Dzynqmp-zcu102-revB.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2016 - 2021, Xilinx, Inc.
10 #include "zynqmp-zcu102-revA.dts"
14 compatible = "xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
18 phy-handle = <&phyc>;
19 phyc: ethernet-phy@c {
21 ti,rx-internal-delay = <0x8>;
22 ti,tx-internal-delay = <0xa>;
23 ti,fifo-depth = <0x1>;
24 ti,dp83867-rxctrl-strap-quirk;
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Dzynqmp-sck-kv-g-revB.dts1 // SPDX-License-Identifier: GPL-2.0
5 * (C) Copyright 2020 - 2021, Xilinx, Inc.
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
15 /dts-v1/;
18 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
19 #address-cells = <1>;
20 #size-cells = <0>;
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Dzynqmp-sck-kv-g-revA.dts1 // SPDX-License-Identifier: GPL-2.0
5 * (C) Copyright 2020 - 2021, Xilinx, Inc.
8 * "A" – A01 board un-modified (NXP)
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/net/ti-dp83867.h>
17 #include <dt-bindings/phy/phy.h>
18 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
20 /dts-v1/;
23 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
24 #address-cells = <1>;
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Dzynqmp-zc1751-xm016-dc2.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm016-dc2
5 * (C) Copyright 2015 - 2021, Xilinx, Inc.
10 /dts-v1/;
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
18 model = "ZynqMP zc1751-xm016-dc2 RevA";
19 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
34 stdout-path = "serial0:115200n8";
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Dzynqmp-zcu104-revC.dts1 // SPDX-License-Identifier: GPL-2.0
5 * (C) Copyright 2017 - 2021, Xilinx, Inc.
10 /dts-v1/;
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
16 #include <dt-bindings/phy/phy.h>
20 compatible = "xlnx,zynqmp-zcu104-revC", "xlnx,zynqmp-zcu104", "xlnx,zynqmp";
37 stdout-path = "serial0:115200n8";
46 compatible = "iio-hwmon";
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Dzynqmp-zcu104-revA.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2017 - 2021, Xilinx, Inc.
10 /dts-v1/;
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
16 #include <dt-bindings/phy/phy.h>
20 compatible = "xlnx,zynqmp-zcu104-revA", "xlnx,zynqmp-zcu104", "xlnx,zynqmp";
37 stdout-path = "serial0:115200n8";
46 compatible = "fixed-clock";
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Dzynqmp-zcu111-revA.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2017 - 2021, Xilinx, Inc.
10 /dts-v1/;
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
17 #include <dt-bindings/phy/phy.h>
21 compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", "xlnx,zynqmp";
38 stdout-path = "serial0:115200n8";
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Dzynqmp-zcu102-revA.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2015 - 2021, Xilinx, Inc.
10 /dts-v1/;
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
17 #include <dt-bindings/phy/phy.h>
21 compatible = "xlnx,zynqmp-zcu102-revA", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
39 stdout-path = "serial0:115200n8";
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Dzynqmp-zcu106-revA.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2016 - 2021, Xilinx, Inc.
10 /dts-v1/;
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
17 #include <dt-bindings/phy/phy.h>
21 compatible = "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106", "xlnx,zynqmp";
39 stdout-path = "serial0:115200n8";
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/Linux-v6.1/Documentation/devicetree/bindings/net/
Dti,dp83867.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/net/ti,dp83867.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: TI DP83867 ethernet PHY
11 - $ref: "ethernet-controller.yaml#"
14 - Andrew Davis <afd@ti.com>
17 The DP83867 device is a robust, low power, fully featured Physical Layer
18 transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX
19 and 1000BASE-T Ethernet protocols.
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/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dmba8mx.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2020-2021 TQ-Systems GmbH
6 #include <dt-bindings/net/ti-dp83867.h>
8 /* TQ-Systems GmbH MBa8Mx baseboard */
12 compatible = "pwm-beeper";
14 beeper-hz = <4000>;
15 amp-supply = <&reg_vcc_3v3>;
19 stdout-path = &uart3;
22 gpio-keys {
23 compatible = "gpio-keys";
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Dimx8mp-tqma8mpql-mba8mpxl.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2021-2022 TQ-Systems GmbH
4 * Author: Alexander Stein <alexander.stein@tq-group.com>
7 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-bindings/pwm/pwm.h>
12 #include "imx8mp-tqma8mpql.dtsi"
15 model = "TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MPxL";
16 compatible = "tq,imx8mp-tqma8mpql-mba8mpxl", "tq,imx8mp-tqma8mpql", "fsl,imx8mp";
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/Linux-v6.1/drivers/net/phy/
Ddp83867.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Driver for the Texas Instruments DP83867 PHY
17 #include <linux/nvmem-consumer.h>
19 #include <dt-bindings/net/ti-dp83867.h>
185 struct net_device *ndev = phydev->attached_dev; in dp83867_set_wol()
192 if (wol->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_UCAST | in dp83867_set_wol()
197 if (wol->wolopts & WAKE_MAGIC) { in dp83867_set_wol()
198 mac = (const u8 *)ndev->dev_addr; in dp83867_set_wol()
201 return -EINVAL; in dp83867_set_wol()
215 if (wol->wolopts & WAKE_MAGICSECURE) { in dp83867_set_wol()
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