Searched full:dmc0 (Results 1 – 7 of 7) sorted by relevance
83 ppmu_dmc0_3: ppmu-event3-dmc0 {84 event-name = "ppmu-event3-dmc0";87 ppmu_dmc0_2: ppmu-event2-dmc0 {88 event-name = "ppmu-event2-dmc0";91 ppmu_dmc0_1: ppmu-event1-dmc0 {92 event-name = "ppmu-event1-dmc0";95 ppmu_dmc0_0: ppmu-event0-dmc0 {96 event-name = "ppmu-event0-dmc0";163 ppmu-event3-dmc0 {164 event-name = "ppmu-event3-dmc0";
13 ppmu_dmc0_3: ppmu-event3-dmc0 {14 event-name = "ppmu-event3-dmc0";
28 dmc0 = &dmc0;512 dmc0: dmc@f0000000 { label
106 /* DRAM configuration (DMC0 and DMC1) */120 DMC0 = 0, enumerator202 if (ch == DMC0) { in s5pv210_set_refresh()282 s5pv210_set_refresh(DMC0, 83000); in s5pv210_target()458 * DMC0 : 166Mhz in s5pv210_target()461 s5pv210_set_refresh(DMC0, 166000); in s5pv210_target()465 * DMC0 : 83Mhz in s5pv210_target()468 s5pv210_set_refresh(DMC0, 83000); in s5pv210_target()
56 dmc0: dmc@200000 {
103 ppmu_event_dmc0_0: ppmu-event3-dmc0-0 {
60 PPMU_EVENT(dmc0),