Home
last modified time | relevance | path

Searched +full:display +full:- +full:backend (Results 1 – 25 of 58) sorted by relevance

123

/Linux-v5.10/Documentation/devicetree/bindings/display/
Dallwinner,sun4i-a10-display-backend.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-backend.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Display Engine Backend Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 The display engine backend exposes layers and sprites to the system.
19 - allwinner,sun4i-a10-display-backend
20 - allwinner,sun5i-a13-display-backend
[all …]
Dallwinner,sun4i-a10-display-engine.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-engine.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Display Engine Pipeline Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 The display engine pipeline (and its entry point, since it can be
15 either directly the backend or the frontend) is represented as an
18 The Allwinner A10 Display pipeline is composed of several components
[all …]
/Linux-v5.10/drivers/gpu/drm/sun4i/
Dsun4i_backend.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
14 #include <linux/dma-mapping.h>
34 /* backend <-> TCON muxing selection done in backend */
54 regmap_write(engine->regs, SUN4I_BACKEND_OCCTL_REG, in sun4i_backend_apply_color_correction()
58 regmap_write(engine->regs, SUN4I_BACKEND_OCRCOEF_REG(i), in sun4i_backend_apply_color_correction()
67 regmap_update_bits(engine->regs, SUN4I_BACKEND_OCCTL_REG, in sun4i_backend_disable_color_correction()
75 regmap_write(engine->regs, SUN4I_BACKEND_REGBUFFCTL_REG, in sun4i_backend_commit()
80 void sun4i_backend_layer_enable(struct sun4i_backend *backend, in sun4i_backend_layer_enable() argument
93 regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_MODCTL_REG, in sun4i_backend_layer_enable()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "DRM Support for Allwinner A10 Display Engine"
14 Display Engine. If M is selected the module will be called
15 sun4i-drm.
36 tristate "Support for Allwinner A10 Display Engine Backend"
40 original Allwinner Display Engine, which has a backend to
42 selected the module will be called sun4i-backend.
45 tristate "Allwinner A31 MIPI-DSI Controller Support"
52 MIPI-DSI support. If M is selected the module will be called
65 tristate "Support for Allwinner Display Engine 2.0 Mixer"
[all …]
Dsun4i_tcon.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
47 drm_connector_list_iter_begin(encoder->dev, &iter); in sun4i_tcon_get_connector()
49 if (connector->encoder == encoder) { in sun4i_tcon_get_connector()
65 return -EINVAL; in sun4i_tcon_get_pixel_depth()
67 info = &connector->display_info; in sun4i_tcon_get_pixel_depth()
68 if (info->num_bus_formats != 1) in sun4i_tcon_get_pixel_depth()
69 return -EINVAL; in sun4i_tcon_get_pixel_depth()
71 switch (info->bus_formats[0]) { in sun4i_tcon_get_pixel_depth()
80 return -EINVAL; in sun4i_tcon_get_pixel_depth()
[all …]
Dsun4i_drv.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
36 args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), 2); in drm_sun4i_gem_dumb_create()
48 .name = "sun4i-drm",
49 .desc = "Allwinner sun4i Display Engine",
70 ret = -ENOMEM; in sun4i_drv_bind()
75 drm->dev_private = drv; in sun4i_drv_bind()
76 INIT_LIST_HEAD(&drv->frontend_list); in sun4i_drv_bind()
77 INIT_LIST_HEAD(&drv->engine_list); in sun4i_drv_bind()
78 INIT_LIST_HEAD(&drv->tcon_list); in sun4i_drv_bind()
[all …]
/Linux-v5.10/drivers/gpu/drm/xen/
Dxen_drm_front.h1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
4 * Xen para-virtual DRM device
6 * Copyright (C) 2016-2018 EPAM Systems Inc.
27 * DOC: Driver modes of operation in terms of display buffers used
29 * Depending on the requirements for the para-virtualized environment, namely
31 * host and guest environments, display buffers can be allocated by either
32 * frontend driver or backend.
42 * hardware can still reach display buffer memory while importing PRIME
47 * DOC: Buffers allocated by the backend
49 * This mode of operation is run-time configured via guest domain configuration
[all …]
Dxen_drm_front_kms.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
4 * Xen para-virtual DRM device
6 * Copyright (C) 2016-2018 EPAM Systems Inc.
25 * Timeout in ms to wait for frame done event from the backend:
26 * must be a bit more than IO time-out
38 struct xen_drm_front_drm_info *drm_info = fb->dev->dev_private; in fb_destroy()
41 if (drm_dev_enter(fb->dev, &idx)) { in fb_destroy()
42 xen_drm_front_fb_detach(drm_info->front_info, in fb_destroy()
57 struct xen_drm_front_drm_info *drm_info = dev->dev_private; in fb_create()
66 gem_obj = fb->obj[0]; in fb_create()
[all …]
Dxen_drm_front.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
4 * Xen para-virtual DRM device
6 * Copyright (C) 2016-2018 EPAM Systems Inc.
12 #include <linux/dma-mapping.h>
27 #include <xen/xen-front-pgdir-shbuf.h>
47 dbuf->dbuf_cookie = dbuf_cookie; in dbuf_add_to_list()
48 list_add(&dbuf->list, &front_info->dbuf_list); in dbuf_add_to_list()
57 if (buf->dbuf_cookie == dbuf_cookie) in dbuf_get()
68 if (buf->dbuf_cookie == dbuf_cookie) { in dbuf_free()
69 list_del(&buf->list); in dbuf_free()
[all …]
Dxen_drm_front_cfg.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
4 * Xen para-virtual DRM device
6 * Copyright (C) 2016-2018 EPAM Systems Inc.
27 connector_path = devm_kasprintf(&front_info->xb_dev->dev, in cfg_connector()
30 return -ENOMEM; in cfg_connector()
34 &connector->width, &connector->height) < 0) { in cfg_connector()
36 connector->width = 0; in cfg_connector()
37 connector->height = 0; in cfg_connector()
38 return -EINVAL; in cfg_connector()
41 connector->xenstore_path = connector_path; in cfg_connector()
[all …]
/Linux-v5.10/Documentation/gpu/
Dxen-front.rst2 drm/xen-front Xen para-virtualized frontend driver
5 This frontend driver implements Xen para-virtualized display
6 according to the display protocol described at
9 Driver modes of operation in terms of display buffers used
12 .. kernel-doc:: drivers/gpu/drm/xen/xen_drm_front.h
13 :doc: Driver modes of operation in terms of display buffers used
16 ----------------------------------------
18 .. kernel-doc:: drivers/gpu/drm/xen/xen_drm_front.h
21 Buffers allocated by the backend
22 --------------------------------
[all …]
/Linux-v5.10/include/xen/interface/io/
Ddisplif.h4 * Unified display device I/O interface for Xen guest OSes.
24 * Copyright (C) 2016-2017 EPAM Systems Inc.
49 * sophisticated use-cases than a framebuffer device can handle. At the
54 * o better configuration options including multiple display support
59 * Note: display resolution (XenStore's "resolution" property) defines
60 * visible area of the virtual display. At the same time resolution of
61 * the display and frame buffers may differ: buffers can be smaller, equal
62 * or bigger than the visible area. This is to enable use-cases, where backend
63 * may do some post-processing of the display and frame buffers supplied,
70 * o display/connector cloning
[all …]
/Linux-v5.10/arch/arm/boot/dts/
Dsun8i-a23.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include "sun8i-a23-a33.dtsi"
50 #sound-dai-cells = <0>;
51 compatible = "allwinner,sun8i-a23-codec";
55 clock-names = "apb", "codec";
58 dma-names = "rx", "tx";
59 allwinner,codec-analog-controls = <&codec_analog>;
66 compatible = "allwinner,sun8i-a23-display-backend";
[all …]
Dsun8i-a33.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include "sun8i-a23-a33.dtsi"
46 #include <dt-bindings/thermal/thermal.h>
50 compatible = "operating-points-v2";
51 opp-shared;
53 opp-120000000 {
54 opp-hz = /bits/ 64 <120000000>;
55 opp-microvolt = <1040000>;
[all …]
Dsun4i-a10.dtsi5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/thermal/thermal.h>
45 #include <dt-bindings/dma/sun4i-a10.h>
46 #include <dt-bindings/clock/sun4i-a10-ccu.h>
47 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #address-cells = <1>;
51 #size-cells = <1>;
52 interrupt-parent = <&intc>;
59 #address-cells = <1>;
60 #size-cells = <1>;
[all …]
Dsun9i-a80.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun9i-a80-ccu.h>
48 #include <dt-bindings/clock/sun9i-a80-de.h>
49 #include <dt-bindings/clock/sun9i-a80-usb.h>
50 #include <dt-bindings/reset/sun9i-a80-ccu.h>
51 #include <dt-bindings/reset/sun9i-a80-de.h>
52 #include <dt-bindings/reset/sun9i-a80-usb.h>
[all …]
Dsun6i-a31.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
48 #include <dt-bindings/clock/sun6i-a31-ccu.h>
49 #include <dt-bindings/reset/sun6i-a31-ccu.h>
52 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <1>;
61 #address-cells = <1>;
[all …]
/Linux-v5.10/drivers/xen/
Dxen-front-pgdir-shbuf.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
4 * Xen frontend/backend page directory based shared buffer
22 #include <xen/xen-front-pgdir-shbuf.h>
36 * buffer. This structure is common to many Xen para-virtualized
47 * is allocated by the corresponding backend or frontend.
58 /* Fill page directory according to para-virtual display protocol. */
74 * page directory. Usually this is passed to the backend,
85 if (!buf->grefs) in xen_front_pgdir_shbuf_get_dir_start()
88 return buf->grefs[0]; in xen_front_pgdir_shbuf_get_dir_start()
98 * references onto the backing storage (buf->pages).
[all …]
/Linux-v5.10/Documentation/filesystems/
D9p.rst1 .. SPDX-License-Identifier: GPL-2.0
26 http://xcpu.org/papers/xcpu-talk.pdf
30 http://xcpu.org/papers/cellfs-talk.pdf
33 * VirtFS: A Virtualization Aware File System pass-through
41 mount -t 9p 10.10.1.2 /mnt/9
45 mount -t 9p `namespace`/acme /mnt/9 -o trans=unix,uname=$USER
49 mount -t 9p -o trans=virtio <mount_tag> /mnt/9
87 intended for exclusive, read-only mounts
89 use FS-Cache for a persistent, read-only
90 cache backend.
[all …]
/Linux-v5.10/Documentation/filesystems/caching/
Dbackend-api.rst1 .. SPDX-License-Identifier: GPL-2.0
4 FS-Cache Cache backend API
7 The FS-Cache system provides an API by which actual caches can be supplied to
8 FS-Cache for it to then serve out to network filesystems and other interested
11 This API is declared in <linux/fscache-cache.h>.
18 cache the backend wants to make available. For instance, CacheFS does this in
32 * "ops" is a pointer to the table of operations that the backend supports on
35 * "idfmt" is a format and printf-style arguments for constructing a label
39 The cache should then be registered with FS-Cache by passing a pointer to the
48 * "fsdef" which should point to the object representation for the FS-Cache
[all …]
/Linux-v5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu7_hwmgr.c116 PP_ASSERT_WITH_CODE((PhwVIslands_Magic == hw_ps->magic), in cast_phw_smu7_power_state()
126 PP_ASSERT_WITH_CODE((PhwVIslands_Magic == hw_ps->magic), in cast_const_phw_smu7_power_state()
141 cgs_write_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_INDEX, 0x9F); in smu7_get_mc_microcode_version()
143 hwmgr->microcode_version_info.MC = cgs_read_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_DATA); in smu7_get_mc_microcode_version()
153 speedCntl = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__PCIE, in smu7_get_current_pcie_speed()
164 link_width = PHM_READ_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__PCIE, in smu7_get_current_pcie_lane_number()
181 if (hwmgr->chip_id == CHIP_VEGAM) { in smu7_enable_smc_voltage_controller()
182 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, in smu7_enable_smc_voltage_controller()
184 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, in smu7_enable_smc_voltage_controller()
188 if (hwmgr->feature_mask & PP_SMC_VOLTAGE_CONTROL_MASK) in smu7_enable_smc_voltage_controller()
[all …]
Dsmu8_hwmgr.c27 #include "atom-types.h"
53 if (smu8_magic != hw_ps->magic) in cast_smu8_power_state()
62 if (smu8_magic != hw_ps->magic) in cast_const_smu8_power_state()
73 hwmgr->dyn_state.vce_clock_voltage_dependency_table; in smu8_get_eclk_level()
78 for (i = 0; i < (int)ptable->count; i++) { in smu8_get_eclk_level()
79 if (clock <= ptable->entries[i].ecclk) in smu8_get_eclk_level()
86 for (i = ptable->count - 1; i >= 0; i--) { in smu8_get_eclk_level()
87 if (clock >= ptable->entries[i].ecclk) in smu8_get_eclk_level()
104 hwmgr->dyn_state.vddc_dependency_on_sclk; in smu8_get_sclk_level()
109 for (i = 0; i < (int)table->count; i++) { in smu8_get_sclk_level()
[all …]
Dvega10_hwmgr.c96 PP_ASSERT_WITH_CODE((PhwVega10_Magic == hw_ps->magic), in cast_phw_vega10_power_state()
106 PP_ASSERT_WITH_CODE((PhwVega10_Magic == hw_ps->magic), in cast_const_phw_vega10_power_state()
115 struct vega10_hwmgr *data = hwmgr->backend; in vega10_set_default_registry_data()
117 data->registry_data.sclk_dpm_key_disabled = in vega10_set_default_registry_data()
118 hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
119 data->registry_data.socclk_dpm_key_disabled = in vega10_set_default_registry_data()
120 hwmgr->feature_mask & PP_SOCCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
121 data->registry_data.mclk_dpm_key_disabled = in vega10_set_default_registry_data()
122 hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
123 data->registry_data.pcie_dpm_key_disabled = in vega10_set_default_registry_data()
[all …]
/Linux-v5.10/drivers/gpu/drm/msm/
Dmsm_kms.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
18 /* As there are different display controller blocks depending on the
38 * a crtc_mask (ie. ->flush_commit(), and ->complete_commit())
39 * might not be evenly balanced with ->prepare_commit(), however
40 * each crtc that effected by a ->prepare_commit() (potentially
48 * ->complete_commit() time may have accumulated cleanup work
63 * If the kms backend supports async commit, it should implement
84 * Wait for any in-progress flush to complete on the specified
85 * crtcs. This should not block if there is no in-progress
[all …]
/Linux-v5.10/tools/perf/Documentation/
Dperf-stat.txt1 perf-stat(1)
5 ----
6 perf-stat - Run a command and gather performance counter statistics
9 --------
11 'perf stat' [-e <EVENT> | --event=EVENT] [-a] <command>
12 'perf stat' [-e <EVENT> | --event=EVENT] [-a] -- <command> [<options>]
13 'perf stat' [-e <EVENT> | --event=EVENT] [-a] record [-o file] -- <command> [<options>]
14 'perf stat' report [-i file]
17 -----------
23 -------
[all …]

123