Searched +full:devapc +full:- +full:infra +full:- +full:clock (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)4 ---5 $id: "http://devicetree.org/schemas/soc/mediatek/devapc.yaml#"6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"17 - Neal Liu <neal.liu@mediatek.com>22 - mediatek,mt6779-devapc23 - mediatek,mt8186-devapc26 description: The base address of devapc register bank34 description: Contains module clock source and clock names37 clock-names:[all …]
1 // SPDX-License-Identifier: GPL-2.064 reg = ctx->infra_base + ctx->data->regs_ofs->vio_sta_offset; in clear_vio_status()66 for (i = 0; i < VIO_MOD_TO_REG_IND(ctx->data->vio_idx_num) - 1; i++) in clear_vio_status()69 writel(GENMASK(VIO_MOD_TO_REG_OFF(ctx->data->vio_idx_num) - 1, 0), in clear_vio_status()79 reg = ctx->infra_base + ctx->data->regs_ofs->vio_mask_offset; in mask_module_irq()86 for (i = 0; i < VIO_MOD_TO_REG_IND(ctx->data->vio_idx_num) - 1; i++) in mask_module_irq()91 val |= GENMASK(VIO_MOD_TO_REG_OFF(ctx->data->vio_idx_num) - 1, in mask_module_irq()94 val &= ~GENMASK(VIO_MOD_TO_REG_OFF(ctx->data->vio_idx_num) - 1, in mask_module_irq()103 * devapc_sync_vio_dbg - do "shift" mechansim" to get full violation information.104 * shift mechanism is depends on devapc hardware design.[all …]
1 // SPDX-License-Identifier: GPL-2.0+8 #include <dt-bindings/clock/mt6779-clk.h>9 #include <dt-bindings/interrupt-controller/irq.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/pinctrl/mt6779-pinfunc.h>15 interrupt-parent = <&sysirq>;16 #address-cells = <2>;17 #size-cells = <2>;20 compatible = "arm,psci-0.2";25 #address-cells = <1>;[all …]
