/Linux-v6.6/Documentation/devicetree/bindings/mmc/ |
D | rockchip-dw-mshc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 13 controller that are not already included in the synopsys-dw-mshc-common.yaml 17 - $ref: synopsys-dw-mshc-common.yaml# 20 - Heiko Stuebner <heiko@sntech.de> 27 - const: rockchip,rk2928-dw-mshc 29 - const: rockchip,rk3288-dw-mshc 30 - items: [all …]
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/Linux-v6.6/drivers/mmc/host/ |
D | dw_mmc-rockchip.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 11 #include <linux/mmc/slot-gpio.h> 16 #include "dw_mmc-pltfm.h" 31 struct dw_mci_rockchip_priv_data *priv = host->priv; in dw_mci_rk3288_set_ios() 36 if (ios->clock == 0) in dw_mci_rk3288_set_ios() 43 * ios->clock = (div == 0) ? bus_hz : (bus_hz / (2 * div)) in dw_mci_rk3288_set_ios() 46 * DDR52 8-bit mode. in dw_mci_rk3288_set_ios() 48 if (ios->bus_width == MMC_BUS_WIDTH_8 && in dw_mci_rk3288_set_ios() 49 ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_rk3288_set_ios() 50 cclkin = 2 * ios->clock * RK3288_CLKGEN_DIV; in dw_mci_rk3288_set_ios() [all …]
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D | sdhci-of-arasan.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu> 9 * Based on sdhci-of-esdhc.c 18 #include <linux/clk-provider.h> 26 #include <linux/firmware/xlnx-zynqmp.h> 29 #include "sdhci-cqhci.h" 30 #include "sdhci-pltfm.h" 79 /* Default settings for ZynqMP Clock Phases */ 92 * On some SoCs the syscon area has a feature where the upper 16-bits of 93 * each 32-bit register act as a write mask for the lower 16-bits. This allows [all …]
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/Linux-v6.6/Documentation/networking/ |
D | can.rst | 2 SocketCAN - Controller Area Network 20 .. _socketcan-motivation: 29 functionality. Usually, there is only a hardware-specific device 32 Queueing of frames and higher-level transport protocols like ISO-TP 34 character-device implementations support only one single process to 47 protocol family module and also vice-versa. Also, the protocol family 57 communicate using a specific transport protocol, e.g. ISO-TP, just 60 CAN-IDs, frames, etc. 62 Similar functionality visible from user-space could be provided by a 74 * **Abstraction:** In most existing character-device implementations, the [all …]
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/Linux-v6.6/drivers/clk/rockchip/ |
D | clk-mmc-phase.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 9 #include <linux/clk-provider.h> 41 * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to 54 /* Constant signal, no measurable phase shift */ in rockchip_mmc_get_phase() 58 raw_value = readl(mmc_clock->reg) >> (mmc_clock->shift); in rockchip_mmc_get_phase() 86 * MMC host to the card, which expects the phase clock inherits in rockchip_mmc_set_phase() 98 return -EINVAL; in rockchip_mmc_set_phase() 106 * actually go non-monotonic. We don't go _too_ monotonic in rockchip_mmc_set_phase() 125 * don't overflow 32-bit / 64-bit numbers. in rockchip_mmc_set_phase() 138 writel(HIWORD_UPDATE(raw_value, 0x07ff, mmc_clock->shift), in rockchip_mmc_set_phase() [all …]
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/Linux-v6.6/Documentation/driver-api/media/drivers/ |
D | cx88-devel.rst | 1 .. SPDX-License-Identifier: GPL-2.0 9 ------------------------------------------- 13 .. code-block:: none 15 Previous default from DScaler: 0x1c1f0008 16 Digit 8: 31-28 19 Digit 7: 27-24 (0xc = 12 = b1100 ) 24 Digits 6,5: 23-16 25 25-16: COMB_RANGE = 0x1f [default] (9 bits -> max 512) 27 Digit 4: 15-12 33 Digit 3: 11-8 [all …]
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/Linux-v6.6/drivers/gpu/drm/amd/display/dc/dce/ |
D | dce_audio.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 35 aud->base.ctx 40 (aud->regs->reg) 44 aud->shifts->field_name, aud->masks->field_name 99 for (index = 0; index < audio_info->mode_count; index++) { in is_audio_format_supported() 100 if (audio_info->modes[index].format_code == audio_format_code) { in is_audio_format_supported() 104 if (audio_info->modes[index].channel_count > in is_audio_format_supported() 105 audio_info->modes[max_channe_index].channel_count) { in is_audio_format_supported() 123 /*For HDMI, calculate if specified sample rates can fit into a given timing */ 142 if ((crtc_info->requested_pixel_clock_100Hz <= 270000) && in check_audio_bandwidth_hdmi() [all …]
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/Linux-v6.6/sound/soc/meson/ |
D | axg-tdm-interface.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 11 #include <sound/soc-dai.h> 13 #include "axg-tdm.h" 50 dev_err(dai->dev, "interface has no slot\n"); in axg_tdm_set_tdm_slots() 51 return -EINVAL; in axg_tdm_set_tdm_slots() 54 iface->slots = slots; in axg_tdm_set_tdm_slots() 73 default: in axg_tdm_set_tdm_slots() 74 dev_err(dai->dev, "unsupported slot width: %d\n", slot_width); in axg_tdm_set_tdm_slots() 75 return -EINVAL; in axg_tdm_set_tdm_slots() 78 iface->slot_width = slot_width; in axg_tdm_set_tdm_slots() [all …]
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/Linux-v6.6/arch/arm/boot/dts/rockchip/ |
D | rv1126-edgeble-neu2.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 compatible = "edgeble,neural-compute-module-2", "rockchip,rv1126"; 14 vccio_flash: vccio-flash-regulator { 15 compatible = "regulator-fixed"; 16 enable-active-high; 18 pinctrl-names = "default"; 19 pinctrl-0 = <&flash_vol_sel>; 20 regulator-name = "vccio_flash"; 21 regulator-always-on; 22 regulator-boot-on; [all …]
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D | rv1126-edgeble-neu2-io.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 9 #include "rv1126-edgeble-neu2.dtsi" 13 compatible = "edgeble,neural-compute-module-2-io", 14 "edgeble,neural-compute-module-2", "rockchip,rv1126"; 21 stdout-path = "serial2:1500000n8"; 24 vcc12v_dcin: vcc12v-dcin-regulator { 25 compatible = "regulator-fixed"; 26 regulator-name = "vcc12v_dcin"; 27 regulator-always-on; [all …]
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D | rk3288-veyron-sdmmc.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 15 sdcard-supply = <&vccio_sd>; 24 sdmmc_bus4: sdmmc-bus4 { 31 sdmmc_clk: sdmmc-clk { 35 sdmmc_cmd: sdmmc-cmd { 45 sdmmc_cd_disabled: sdmmc-cd-disabled { 50 sdmmc_cd_pin: sdmmc-cd-pin { 57 vcc9-supply = <&vcc_5v>; 61 regulator-name = "vccio_sd"; 62 regulator-min-microvolt = <1800000>; [all …]
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/Linux-v6.6/Documentation/trace/rv/ |
D | da_monitor_instrumentation.rst | 51 -------------------------- 84 Otherwise, the monitor and the system could be out-of-sync. 113 ---------------------------- 132 But no change was required because: by default, these functions *attach* and 136 ----------------------- 139 kernel event, at the monitoring enable phase. 143 adds "rv_attach_trace_probe()" function call for each model event in the enable phase, as 146 For example, from the wip sample model:: 163 The probes then need to be detached at the disable phase.
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/Linux-v6.6/arch/arm64/boot/dts/rockchip/ |
D | rk3368-lion-haikou.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include "rk3368-lion.dtsi" 10 model = "Theobroma Systems RK3368-uQ7 Baseboard"; 11 compatible = "tsd,rk3368-lion-haikou", "rockchip,rk3368"; 18 stdout-path = "serial0:115200n8"; 32 pinctrl-0 = <&module_led_pins>, <&sd_card_led_pin>; 34 sd_card_led: led-3 { 37 linux,default-trigger = "mmc0"; 41 dc_12v: dc-12v { [all …]
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/Linux-v6.6/drivers/gpu/drm/i915/display/ |
D | skl_scaler.c | 1 // SPDX-License-Identifier: MIT 14 * The hardware phase 0.0 refers to the center of the pixel. 15 * We want to start from the top/left edge which is phase 16 * -0.5. That matches how the hardware calculates the scaling 17 * factors (from top-left of the first pixel to bottom-right 21 * adjust that so that the chroma sample position lands in 28 * The same behaviour is observed on pre-SKL platforms as well. 30 * Theory behind the formula (note that we ignore sub-pixel 32 * s = source sample position 33 * d = destination sample position [all …]
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/Linux-v6.6/net/ipv4/ |
D | tcp_bbr.c | 21 * +---> STARTUP ----+ 24 * | DRAIN ----+ 27 * +---> PROBE_BW ----+ 30 * | +----+ | 32 * +---- PROBE_RTT <--+ 37 * A long-lived BBR flow spends the vast majority of its time remaining 41 * sample that matches or decreases its min_rtt estimate for 10 seconds, then 42 * it briefly enters PROBE_RTT to cut inflight to a minimum value to re-probe 43 * the path's two-way propagation delay (min_rtt). When exiting PROBE_RTT, if 48 * "BBR: Congestion-Based Congestion Control", [all …]
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D | tcp_westwood.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * TCP Westwood+: end-to-end bandwidth estimation for TCP 10 * - Mascolo S, Casetti, M. Gerla et al. 13 * - A. Grieco, s. Mascolo 17 * - A. Dell'Aera, L. Grieco, S. Mascolo. 18 * "Linux 2.4 Implementation of Westwood+ TCP with Rate-Halving : 21 * Westwood+ employs end-to-end bandwidth measurement to set cwnd and 22 * ssthresh after packet loss. The probing phase is as the original Reno. 43 u8 reset_rtt_min; /* Reset RTT min to next RTT sample*/ 65 w->bk = 0; in tcp_westwood_init() [all …]
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D | tcp_veno.c | 1 // SPDX-License-Identifier: GPL-2.0-only 20 /* Default values of the Veno variables, in fixed-point representation 36 /* There are several situations when we must "re-start" Veno: 50 veno->doing_veno_now = 1; in veno_enable() 52 veno->minrtt = 0x7fffffff; in veno_enable() 60 veno->doing_veno_now = 0; in veno_disable() 67 veno->basertt = 0x7fffffff; in tcp_veno_init() 68 veno->inc = 1; in tcp_veno_init() 74 const struct ack_sample *sample) in tcp_veno_pkts_acked() argument 79 if (sample->rtt_us < 0) in tcp_veno_pkts_acked() [all …]
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/Linux-v6.6/tools/perf/scripts/python/ |
D | gecko.py | 1 # gecko.py - Convert perf record output to Firefox's gecko profile format 2 # SPDX-License-Identifier: GPL-2.0 9 # perf record -a -g -F 99 sleep 60 14 # perf script gecko -F 99 -a sleep 60 32 # Add the Perf-Trace-Util library to the Python path 34 '/scripts/python/Perf-Trace-Util/lib/Perf/Trace') 48 # https://github.com/firefox-devtools/profiler/blob/53970305b51b9b472e26d7457fee1d66cd4e2737/src/ty… 49 …llow Brendan Gregg's Flamegraph convention: orange for kernel and yellow for user space by default. 53 PRODUCT = os.popen('uname -op').read().strip() 68 # https://github.com/firefox-devtools/profiler/blob/53970305b51b9b472e26d7457fee1d66cd4e2737/src/ty… [all …]
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/Linux-v6.6/kernel/time/ |
D | ntp.c | 1 // SPDX-License-Identifier: GPL-2.0 49 * phase-lock loop variables 82 /* constant (boot-param configurable) NTP tick adjustment (upscaled) */ 91 * The following variables are used when a pulse-per-second (PPS) signal 105 static long pps_tf[3]; /* phase median filter */ 122 /* PPS kernel consumer compensates the whole phase error immediately. 142 * pps_clear - Clears the PPS state variables 161 pps_valid--; in pps_dec_valid() 195 txc->ppsfreq = shift_right((pps_freq >> PPM_SCALE_INV_SHIFT) * in pps_fill_timex() 197 txc->jitter = pps_jitter; in pps_fill_timex() [all …]
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/Linux-v6.6/tools/perf/Documentation/ |
D | perf-report.txt | 1 perf-report(1) 5 ---- 6 perf-report - Read perf.data (created by perf record) and display the profile 9 -------- 11 'perf report' [-i <file> | --input=file] 14 ----------- 19 ------- 20 -i:: 21 --input=:: 22 Input file name. (default: perf.data unless stdin is a fifo) [all …]
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D | perf-top.txt | 1 perf-top(1) 5 ---- 6 perf-top - System profiling tool. 9 -------- 11 'perf top' [-e <EVENT> | --event=EVENT] [<options>] 14 ----------- 19 ------- 20 -a:: 21 --all-cpus:: 22 System-wide collection. (default) [all …]
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D | perf-c2c.txt | 1 perf-c2c(1) 5 ---- 6 perf-c2c - Shared Data C2C/HITM Analyzer. 9 -------- 12 'perf c2c record' [<options>] \-- [<record command options>] <command> 16 ----------- 26 sample load and store operations, therefore hardware and kernel support is 27 required. See linkperf:perf-arm-spe[1] for a setup guide. Due to the 32 - memory address of the access 33 - type of the access (load and store details) [all …]
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D | perf-record.txt | 1 perf-record(1) 5 ---- 6 perf-record - Run a command and record its profile into perf.data 9 -------- 11 'perf record' [-e <EVENT> | --event=EVENT] [-a] <command> 12 'perf record' [-e <EVENT> | --event=EVENT] [-a] \-- <command> [<options>] 15 ----------- 17 from it, into perf.data - without displaying anything. 23 ------- 27 -e:: [all …]
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/Linux-v6.6/include/sound/ |
D | emu10k1.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 16 #include <sound/pcm-indirect.h> 25 /* ------------------- DEFINES -------------------- */ 33 /* FIXME? - according to the OSS driver the EMU10K1 needs a 29 bit DMA mask */ 41 // This is used to define hardware bit-fields (sub-registers) by combining 44 // The non-concatenating (_NC) variant should be used directly only for 45 // sub-registers that do not follow the <register>_<field> naming pattern. 55 // Macros for manipulating values of bit-fields declared using the above macros. 59 // single sub-register at a time. 62 #define REG_MASK0(r) ((1U << REG_SIZE(r)) - 1U) [all …]
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/Linux-v6.6/drivers/gpu/drm/imx/dcss/ |
D | dcss-scaler.c | 1 // SPDX-License-Identifier: GPL-2.0 11 #include "dcss-dev.h" 103 #define PSC_PHASE_MASK (PSC_NUM_PHASES - 1) 105 #define PSC_Q_ROUND_OFFSET (1 << (PSC_Q_FRACTION - 1)) 108 * mult_q() - Performs fixed-point multiplication. 124 * div_q() - Performs fixed-point division. 137 temp -= B / 2; in div_q() 144 * exp_approx_q() - Compute approximation to exp(x) function using Taylor 146 * @x: fixed-point argument of exp function 166 * dcss_scaler_gaussian_filter() - Generate gaussian prototype filter. [all …]
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