| /Linux-v5.10/drivers/gpu/drm/sun4i/ |
| D | sun4i_dotclock.c | 28 struct sun4i_dclk *dclk = hw_to_dclk(hw); in sun4i_dclk_disable() local
30 regmap_update_bits(dclk->regmap, SUN4I_TCON0_DCLK_REG, in sun4i_dclk_disable()
36 struct sun4i_dclk *dclk = hw_to_dclk(hw); in sun4i_dclk_enable() local
38 return regmap_update_bits(dclk->regmap, SUN4I_TCON0_DCLK_REG, in sun4i_dclk_enable()
45 struct sun4i_dclk *dclk = hw_to_dclk(hw); in sun4i_dclk_is_enabled() local
48 regmap_read(dclk->regmap, SUN4I_TCON0_DCLK_REG, &val); in sun4i_dclk_is_enabled()
56 struct sun4i_dclk *dclk = hw_to_dclk(hw); in sun4i_dclk_recalc_rate() local
59 regmap_read(dclk->regmap, SUN4I_TCON0_DCLK_REG, &val); in sun4i_dclk_recalc_rate()
73 struct sun4i_dclk *dclk = hw_to_dclk(hw); in sun4i_dclk_round_rate() local
74 struct sun4i_tcon *tcon = dclk->tcon; in sun4i_dclk_round_rate()
[all …]
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| /Linux-v5.10/drivers/clk/hisilicon/ |
| D | clkdivider-hi6220.c | 49 struct hi6220_clk_divider *dclk = to_hi6220_clk_divider(hw); in hi6220_clkdiv_recalc_rate() local
51 val = readl_relaxed(dclk->reg) >> dclk->shift; in hi6220_clkdiv_recalc_rate()
52 val &= div_mask(dclk->width); in hi6220_clkdiv_recalc_rate()
54 return divider_recalc_rate(hw, parent_rate, val, dclk->table, in hi6220_clkdiv_recalc_rate()
55 CLK_DIVIDER_ROUND_CLOSEST, dclk->width); in hi6220_clkdiv_recalc_rate()
61 struct hi6220_clk_divider *dclk = to_hi6220_clk_divider(hw); in hi6220_clkdiv_round_rate() local
63 return divider_round_rate(hw, rate, prate, dclk->table, in hi6220_clkdiv_round_rate()
64 dclk->width, CLK_DIVIDER_ROUND_CLOSEST); in hi6220_clkdiv_round_rate()
73 struct hi6220_clk_divider *dclk = to_hi6220_clk_divider(hw); in hi6220_clkdiv_set_rate() local
75 value = divider_get_val(rate, parent_rate, dclk->table, in hi6220_clkdiv_set_rate()
[all …]
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| /Linux-v5.10/drivers/siox/ |
| D | siox-bus-gpio.c | 20 struct gpio_desc *dclk; member
38 gpiod_set_value_cansleep(ddata->dclk, 0); in siox_gpio_pushpull()
60 gpiod_set_value_cansleep(ddata->dclk, 1); in siox_gpio_pushpull()
62 gpiod_set_value_cansleep(ddata->dclk, 0); in siox_gpio_pushpull()
117 ddata->dclk = devm_gpiod_get(dev, "dclk", GPIOD_OUT_LOW); in siox_gpio_probe()
118 if (IS_ERR(ddata->dclk)) { in siox_gpio_probe()
119 ret = PTR_ERR(ddata->dclk); in siox_gpio_probe()
120 dev_err(dev, "Failed to get %s GPIO: %d\n", "dclk", ret); in siox_gpio_probe()
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| /Linux-v5.10/sound/soc/meson/ |
| D | axg-pdm.c | 94 struct clk *dclk; member
186 /* Max sample counter value per half period of dclk */ in axg_pdm_set_sample_pointer()
188 clk_get_rate(priv->dclk) * 2); in axg_pdm_set_sample_pointer()
253 ret = clk_set_rate(priv->dclk, rate * os); in axg_pdm_hw_params()
255 dev_err(dai->dev, "failed to set dclk\n"); in axg_pdm_hw_params()
276 ret = clk_prepare_enable(priv->dclk); in axg_pdm_startup()
278 dev_err(dai->dev, "enabling dclk failed\n"); in axg_pdm_startup()
294 clk_disable_unprepare(priv->dclk); in axg_pdm_shutdown()
621 priv->dclk = devm_clk_get(dev, "dclk"); in axg_pdm_probe()
622 if (IS_ERR(priv->dclk)) { in axg_pdm_probe()
[all …]
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| /Linux-v5.10/drivers/gpu/drm/i915/display/ |
| D | intel_bw.c | 17 u16 dclk, t_rp, t_rdpre, t_rc, t_ras, t_rcd; member
107 sp->dclk = val & 0xffff; in icl_pcode_read_qgv_point_info()
160 "QGV %d: DCLK=%d tRP=%d tRDPRE=%d tRAS=%d tRCD=%d tRC=%d\n", in icl_get_qgv_points()
161 i, sp->dclk, sp->t_rp, sp->t_rdpre, sp->t_ras, in icl_get_qgv_points()
168 static int icl_calc_bw(int dclk, int num, int den) in icl_calc_bw() argument
171 return DIV_ROUND_CLOSEST(num * dclk * 100, den * 6); in icl_calc_bw()
176 u16 dclk = 0; in icl_sagv_max_dclk() local
180 dclk = max(dclk, qi->points[i].dclk); in icl_sagv_max_dclk()
182 return dclk; in icl_sagv_max_dclk()
258 bw = icl_calc_bw(sp->dclk, clpchgroup * 32 * num_channels, ct); in icl_get_bw_info()
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| /Linux-v5.10/drivers/video/fbdev/riva/ |
| D | nv_driver.c | 276 unsigned long dclk = 0; in riva_get_maxdclk() local
286 dclk = 800000; in riva_get_maxdclk()
288 dclk = 1000000; in riva_get_maxdclk()
294 dclk = 1000000; in riva_get_maxdclk()
303 dclk = 800000; in riva_get_maxdclk()
306 dclk = 1000000; in riva_get_maxdclk()
311 return dclk; in riva_get_maxdclk()
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| /Linux-v5.10/Documentation/devicetree/bindings/siox/ |
| D | eckelmann,siox-gpio.txt | 5 - din-gpios, dout-gpios, dclk-gpios, dld-gpios: references gpios for the
17 dclk-gpios = <&gpio6 9 0>;
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| /Linux-v5.10/drivers/gpu/drm/radeon/ |
| D | rs780_dpm.c | 572 (new_ps->dclk == old_ps->dclk)) in rs780_set_uvd_clock_before_set_eng_clock()
578 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in rs780_set_uvd_clock_before_set_eng_clock()
589 (new_ps->dclk == old_ps->dclk)) in rs780_set_uvd_clock_after_set_eng_clock()
595 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in rs780_set_uvd_clock_after_set_eng_clock()
729 rps->dclk = le32_to_cpu(non_clock_info->ulDCLK); in rs780_parse_pplib_non_clock_info()
732 rps->dclk = 0; in rs780_parse_pplib_non_clock_info()
736 if ((rps->vclk == 0) || (rps->dclk == 0)) { in rs780_parse_pplib_non_clock_info()
738 rps->dclk = RS780_DEFAULT_DCLK_FREQ; in rs780_parse_pplib_non_clock_info()
946 printk("\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in rs780_dpm_print_power_state()
995 seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in rs780_dpm_debugfs_print_current_performance_level()
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| D | radeon_uvd.c | 944 * @dclk: wanted DCLK
954 * @optimal_dclk_div: resulting dclk post divider
960 unsigned vclk, unsigned dclk, in radeon_uvd_calc_upll_dividers() argument
975 vco_min = max(max(vco_min, vclk), dclk); in radeon_uvd_calc_upll_dividers()
995 /* calc dclk divider with current vco freq */ in radeon_uvd_calc_upll_dividers()
996 dclk_div = radeon_uvd_calc_upll_post_div(vco_freq, dclk, in radeon_uvd_calc_upll_dividers()
1002 score = vclk - (vco_freq / vclk_div) + dclk - (vco_freq / dclk_div); in radeon_uvd_calc_upll_dividers()
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| D | sumo_dpm.c | 824 radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk); in sumo_setup_uvd_clocks()
841 (new_rps->dclk == old_rps->dclk)) in sumo_set_uvd_clock_before_set_eng_clock()
859 (new_rps->dclk == old_rps->dclk)) in sumo_set_uvd_clock_after_set_eng_clock()
1415 rps->dclk = le32_to_cpu(non_clock_info->ulDCLK); in sumo_parse_pplib_non_clock_info()
1418 rps->dclk = 0; in sumo_parse_pplib_non_clock_info()
1802 printk("\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in sumo_dpm_print_power_state()
1825 seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in sumo_dpm_debugfs_print_current_performance_level()
1833 seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in sumo_dpm_debugfs_print_current_performance_level()
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| D | trinity_dpm.c | 898 if ((rps->vclk == 0) && (rps->dclk == 0)) in trinity_uvd_clocks_zero()
911 (rps1->dclk == rps2->dclk) && in trinity_uvd_clocks_equal()
943 radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk); in trinity_setup_uvd_clocks()
954 radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk); in trinity_setup_uvd_clocks()
1459 (rps->dclk == pi->sys_info.uvd_clock_table_entries[i].dclk)) in trinity_get_uvd_clock_index()
1693 rps->dclk = le32_to_cpu(non_clock_info->ulDCLK); in trinity_parse_pplib_non_clock_info()
1696 rps->dclk = 0; in trinity_parse_pplib_non_clock_info()
1936 pi->sys_info.uvd_clock_table_entries[i].dclk = in trinity_parse_sys_info_table()
2019 printk("\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in trinity_dpm_print_power_state()
2044 seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in trinity_dpm_debugfs_print_current_performance_level()
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| D | rv6xx_dpm.c | 1519 (new_ps->dclk == old_ps->dclk)) in rv6xx_set_uvd_clock_before_set_eng_clock()
1525 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in rv6xx_set_uvd_clock_before_set_eng_clock()
1536 (new_ps->dclk == old_ps->dclk)) in rv6xx_set_uvd_clock_after_set_eng_clock()
1542 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in rv6xx_set_uvd_clock_after_set_eng_clock()
1804 rps->dclk = RV6XX_DEFAULT_DCLK_FREQ; in rv6xx_parse_pplib_non_clock_info()
1807 rps->dclk = 0; in rv6xx_parse_pplib_non_clock_info()
2015 printk("\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in rv6xx_dpm_print_power_state()
2047 seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in rv6xx_dpm_debugfs_print_current_performance_level()
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| D | rv770_dpm.c | 1439 (new_ps->dclk == old_ps->dclk)) in rv770_set_uvd_clock_before_set_eng_clock()
1445 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in rv770_set_uvd_clock_before_set_eng_clock()
1456 (new_ps->dclk == old_ps->dclk)) in rv770_set_uvd_clock_after_set_eng_clock()
1462 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in rv770_set_uvd_clock_after_set_eng_clock()
2154 rps->dclk = le32_to_cpu(non_clock_info->ulDCLK); in rv7xx_parse_pplib_non_clock_info()
2157 rps->dclk = 0; in rv7xx_parse_pplib_non_clock_info()
2161 if ((rps->vclk == 0) || (rps->dclk == 0)) { in rv7xx_parse_pplib_non_clock_info()
2163 rps->dclk = RV770_DEFAULT_DCLK_FREQ; in rv7xx_parse_pplib_non_clock_info()
2440 printk("\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in rv770_dpm_print_power_state()
2484 seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in rv770_dpm_debugfs_print_current_performance_level()
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| /Linux-v5.10/Documentation/devicetree/bindings/sound/ |
| D | amlogic,axg-pdm.txt | 12 * "dclk" : pdm digital clock
28 clock-names = "pclk", "dclk", "sysclk";
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| /Linux-v5.10/drivers/clk/samsung/ |
| D | clk-s3c2410-dclk.c | 125 * dclk and clkout init
409 .name = "s3c2410-dclk",
412 .name = "s3c2412-dclk",
415 .name = "s3c2440-dclk",
418 .name = "s3c2443-dclk",
428 .name = "s3c24xx-dclk",
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| D | Kconfig | 34 Temporary symbol to build the dclk driver based on the common clock
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| /Linux-v5.10/drivers/video/fbdev/core/ |
| D | fbmon.c | 546 DPRINTK(" mode exceed max DCLK\n"); in get_std_timing()
769 DPRINTK(" H: %d-%dKHz V: %d-%dHz DCLK: %dMHz\n", in fb_get_monitor_limits()
1016 u32 dclk; member
1086 * @dclk: pixelclock in Hz
1098 * where: h_period = SQRT(100 - C + (0.4 * xres * M)/dclk) + C - 100
1105 static u32 fb_get_hblank_by_dclk(u32 dclk, u32 xres) in fb_get_hblank_by_dclk() argument
1109 dclk /= 1000; in fb_get_hblank_by_dclk()
1112 h_period += (M_VAL * xres * 2 * 1000)/(5 * dclk); in fb_get_hblank_by_dclk()
1156 timings->dclk = timings->htotal * timings->hfreq; in fb_timings_vfreq()
1167 timings->dclk = timings->htotal * timings->hfreq; in fb_timings_hfreq()
[all …]
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| /Linux-v5.10/Documentation/devicetree/bindings/display/ |
| D | ssd1307fb.txt | 31 - solomon,dclk-div: Clock divisor 1 to 16
32 - solomon,dclk-frq: Clock frequency 0 to 15, higher value means higher
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| /Linux-v5.10/sound/soc/intel/skylake/ |
| D | skl-ssp-clk.c | 278 static void unregister_src_clk(struct skl_clk_data *dclk) in unregister_src_clk() argument
280 while (dclk->avail_clk_cnt--) in unregister_src_clk()
281 clkdev_drop(dclk->clk[dclk->avail_clk_cnt]->lookup); in unregister_src_clk()
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| /Linux-v5.10/drivers/fpga/ |
| D | socfpga-a10.c | 136 /* Issue the DCLK regmap. */ in socfpga_a10_fpga_generate_dclks()
317 /* Set cfg_ctrl to enable s2f dclk and data */ in socfpga_a10_fpga_write_init()
332 /* Enable override for data, dclk, nce, and pr_request to CSS */ in socfpga_a10_fpga_write_init()
408 /* Disable s2f dclk and data */ in socfpga_a10_fpga_write_complete()
417 /* Disable data, dclk, nce, and pr_request override to CSS */ in socfpga_a10_fpga_write_complete()
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| /Linux-v5.10/Documentation/devicetree/bindings/display/rockchip/ |
| D | rockchip-vop.yaml | 70 - const: dclk
120 reset-names = "axi", "ahb", "dclk";
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| /Linux-v5.10/drivers/gpu/drm/rockchip/ |
| D | rockchip_drm_vop.c | 171 /* vop dclk */
172 struct clk *dclk; member
176 /* vop dclk reset */
600 ret = clk_enable(vop->dclk); in vop_enable()
668 clk_disable(vop->dclk); in vop_enable()
739 clk_disable(vop->dclk); in vop_crtc_atomic_disable()
1183 rate = clk_round_rate(vop->dclk, adjusted_mode->clock * 1000 + 999); in vop_crtc_mode_fixup()
1383 clk_set_rate(vop->dclk, adjusted_mode->clock * 1000); in vop_crtc_atomic_enable()
1905 vop->dclk = devm_clk_get(vop->dev, "dclk_vop"); in vop_initial()
1906 if (IS_ERR(vop->dclk)) { in vop_initial()
[all …]
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| /Linux-v5.10/drivers/gpu/drm/amd/pm/inc/ |
| D | power_state.h | 144 uint32_t DCLK; member
184 unsigned long dclk; member
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| /Linux-v5.10/drivers/clk/mvebu/ |
| D | armada-39x.c | 21 * SARL[14:10] : Ratios between CPU, NBCLK, HCLK and DCLK.
88 { .id = A390_CPU_TO_DCLK, .name = "dclk" },
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| /Linux-v5.10/drivers/video/fbdev/ |
| D | ssd1307fb.c | 300 u32 precharge, dclk, com_invdir, compins; in ssd1307fb_init() local
365 dclk = ((par->dclk_div - 1) & 0xf) | (par->dclk_frq & 0xf) << 4; in ssd1307fb_init()
366 ret = ssd1307fb_write_cmd(par->client, dclk); in ssd1307fb_init()
659 if (device_property_read_u32(dev, "solomon,dclk-div", &par->dclk_div)) in ssd1307fb_probe()
661 if (device_property_read_u32(dev, "solomon,dclk-frq", &par->dclk_frq)) in ssd1307fb_probe()
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