| /Linux-v6.6/Documentation/devicetree/bindings/iio/dac/ |
| D | adi,ad5758.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <Michael.Hennerich@analog.com>
19 spi-cpha: true
21 adi,dc-dc-mode:
25 Mode of operation of the dc-to-dc converter
27 In this mode, the AD5758 circuitry senses the output voltage and
32 In this mode, the VDPC+ voltage is user-programmable to a fixed level
36 voltage output at the VIOUT pin. Only one mode can be enabled at
[all …]
|
| D | adi,ad5755.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD5755 Multi-Channel DAC
10 - Sean Nyekjaer <sean.nyekjaer@prevas.dk>
15 - adi,ad5755
16 - adi,ad5755-1
17 - adi,ad5757
18 - adi,ad5735
19 - adi,ad5737
[all …]
|
| /Linux-v6.6/drivers/gpu/drm/atmel-hlcdc/ |
| D | atmel_hlcdc_dc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 * Author: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
8 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
14 #include <linux/mfd/atmel-hlcdc.h>
100 .name = "high-end-overlay",
212 .name = "high-end-overlay",
330 .name = "high-end-overlay",
425 .name = "high-end-overlay",
467 .compatible = "atmel,at91sam9n12-hlcdc",
471 .compatible = "atmel,at91sam9x5-hlcdc",
[all …]
|
| D | atmel_hlcdc_crtc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 * Author: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
7 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
11 #include <linux/media-bus-format.h>
12 #include <linux/mfd/atmel-hlcdc.h>
29 * struct atmel_hlcdc_crtc_state - Atmel HLCDC CRTC state structure
32 * @output_mode: RGBXXX output mode
46 * struct atmel_hlcdc_crtc - Atmel HLCDC CRTC structure
49 * @dc: pointer to the atmel_hlcdc structure provided by the MFD device
55 struct atmel_hlcdc_dc *dc; member
[all …]
|
| /Linux-v6.6/drivers/gpu/drm/tegra/ |
| D | dc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/dma-mapping.h>
32 #include "dc.h"
43 stats->frames = 0; in tegra_dc_stats_reset()
44 stats->vblank = 0; in tegra_dc_stats_reset()
45 stats->underflow = 0; in tegra_dc_stats_reset()
46 stats->overflow = 0; in tegra_dc_stats_reset()
50 static u32 tegra_dc_readl_active(struct tegra_dc *dc, unsigned long offset) in tegra_dc_readl_active() argument
54 tegra_dc_writel(dc, READ_MUX, DC_CMD_STATE_ACCESS); in tegra_dc_readl_active()
55 value = tegra_dc_readl(dc, offset); in tegra_dc_readl_active()
[all …]
|
| /Linux-v6.6/drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_link_enc_cfg.c | 29 #define DC_LOGGER dc->ctx->logger
40 for (i = 0; i < stream->ctx->dc->res_pool->res_cap->num_dig_link_enc; i++) { in is_dig_link_enc_stream()
41 link_enc = stream->ctx->dc->res_pool->link_encoders[i]; in is_dig_link_enc_stream()
46 if (link_enc && ((uint32_t)stream->link->connector_signal & link_enc->output_signals)) { in is_dig_link_enc_stream()
47 if (dc_is_dp_signal(stream->signal)) { in is_dig_link_enc_stream()
51 stream->ctx->dc->link_srv->dp_decide_link_settings(stream, &link_settings); in is_dig_link_enc_stream()
67 static struct link_enc_assignment get_assignment(struct dc *dc, int i) in get_assignment() argument
71 if (dc->current_state->res_ctx.link_enc_cfg_ctx.mode == LINK_ENC_CFG_TRANSIENT) in get_assignment()
72 assignment = dc->current_state->res_ctx.link_enc_cfg_ctx.transient_assignments[i]; in get_assignment()
74 assignment = dc->current_state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; in get_assignment()
[all …]
|
| D | dc.c | 27 #include "dc.h"
81 dc->ctx
84 dc->ctx->logger
86 static const char DC_BUILD_ID[] = "production-build";
91 * DC is the OS-agnostic component of the amdgpu DC driver.
93 * DC maintains and validates a set of structs representing the state of the
96 * Main DC HW structs:
98 * struct dc - The central struct. One per driver. Created on driver load,
101 * struct dc_context - One per driver.
102 * Used as a backpointer by most other structs in dc.
[all …]
|
| /Linux-v6.6/Documentation/gpu/amdgpu/display/ |
| D | display-manager.rst | 8 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
11 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
17 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
20 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
26 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
29 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
32 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
38 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
41 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
47 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
[all …]
|
| /Linux-v6.6/drivers/usb/musb/ |
| D | musb_cppi41.c | 1 // SPDX-License-Identifier: GPL-2.0
3 #include <linux/dma-mapping.h>
13 #define RNDIS_REG(x) (0x80 + ((x - 1) * 4))
50 unsigned int mode);
59 if (cppi41_channel->is_tx) in save_rx_toggle()
61 if (!is_host_active(cppi41_channel->controller->controller.musb)) in save_rx_toggle()
64 csr = musb_readw(cppi41_channel->hw_ep->regs, MUSB_RXCSR); in save_rx_toggle()
67 cppi41_channel->usb_toggle = toggle; in save_rx_toggle()
72 struct musb_hw_ep *hw_ep = cppi41_channel->hw_ep; in update_rx_toggle()
73 struct musb *musb = hw_ep->musb; in update_rx_toggle()
[all …]
|
| /Linux-v6.6/drivers/gpu/drm/amd/display/dc/ |
| D | dc_stream.h | 2 * Copyright 2012-14 Advanced Micro Devices, Inc.
62 * or has to be fetched by hardware (DMA mode)
71 /* If hardware mode is used, the base address where DMDATA surface is located */
93 /* source MPCC instance. for use by internally by dc */
266 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode
281 /* Output from DC when stream state is committed or altered
282 * DC may only access these values during:
368 bool dc_update_planes_and_stream(struct dc *dc,
383 void dc_commit_updates_for_stream(struct dc *dc,
392 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream);
[all …]
|
| D | dc.h | 2 * Copyright 2012-2023 Advanced Micro Devices, Inc.
99 // for example, 1080p -> 8K is 4.0, or 4000 raw value
107 // for example, 8K -> 1080p is 0.25, or 250 raw value
119 * DOC: color-management-caps
124 * abstracted HW. DCE 5-12 had almost no important changes, but starting with
131 * struct rom_curve_caps - predefined transfer function caps for degamma and regamma
147 * struct dpp_color_caps - color pipeline capabilities for display pipe and
152 * just plain 256-entry lookup
161 * @dgam_rom_for_yuv: pre-defined degamma LUT for YUV planes
162 * @dgam_rom_caps: pre-definied curve caps for degamma 1D LUT
[all …]
|
| /Linux-v6.6/drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_hwseq.c | 43 hws->ctx
45 hws->regs->reg
49 hws->shifts->field_name, hws->masks->field_name
63 …config->gart_config.page_table_base_addr = ((uint64_t)page_table_base_hi << 32) | page_table_base_… in mmhub_update_page_table_config()
67 int dcn21_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_co… in dcn21_init_sys_ctx() argument
71 config.system_aperture.fb_top = pa_config->system_aperture.fb_top; in dcn21_init_sys_ctx()
72 config.system_aperture.fb_offset = pa_config->system_aperture.fb_offset; in dcn21_init_sys_ctx()
73 config.system_aperture.fb_base = pa_config->system_aperture.fb_base; in dcn21_init_sys_ctx()
74 config.system_aperture.agp_top = pa_config->system_aperture.agp_top; in dcn21_init_sys_ctx()
75 config.system_aperture.agp_bot = pa_config->system_aperture.agp_bot; in dcn21_init_sys_ctx()
[all …]
|
| D | dcn21_resource.c | 30 #include "dc.h"
496 return &ipp->base; in dcn21_ipp_create()
511 return &dpp->base; in dcn21_dpp_create()
533 ctx->dc->caps.extended_aux_timeout_support); in dcn21_aux_engine_create()
535 return &aux_engine->base; in dcn21_aux_engine_create()
577 .num_pll = 5, // maybe 3 because the last two used for USB-c
683 for (i = 0; i < pool->base.stream_enc_count; i++) { in dcn21_resource_destruct()
684 if (pool->base.stream_enc[i] != NULL) { in dcn21_resource_destruct()
685 kfree(DCN10STRENC_FROM_STRENC(pool->base.stream_enc[i])); in dcn21_resource_destruct()
686 pool->base.stream_enc[i] = NULL; in dcn21_resource_destruct()
[all …]
|
| /Linux-v6.6/drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_resource.c | 28 #include "dc.h"
725 .dwb_fi_phase = -1, // -1 = disable,
758 return &dpp->base; in dcn30_dpp_create()
778 return &opp->base; in dcn30_opp_create()
796 ctx->dc->caps.extended_aux_timeout_support); in dcn30_aux_engine_create()
798 return &aux_engine->base; in dcn30_aux_engine_create()
854 return &mpc30->base; in dcn30_mpc_create()
874 struct dcn20_vmid *vmid = &hubbub3->vmid[i]; in dcn30_hubbub_create()
876 vmid->ctx = ctx; in dcn30_hubbub_create()
878 vmid->regs = &vmid_regs[i]; in dcn30_hubbub_create()
[all …]
|
| D | dcn30_hwseq.c | 61 hws->ctx
63 hws->regs->reg
65 dc->ctx->logger
70 hws->shifts->field_name, hws->masks->field_name
75 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn30_set_blend_lut()
79 if (plane_state->blend_tf) { in dcn30_set_blend_lut()
80 if (plane_state->blend_tf->type == TF_TYPE_HWPWL) in dcn30_set_blend_lut()
81 blend_lut = &plane_state->blend_tf->pwl; in dcn30_set_blend_lut()
82 else if (plane_state->blend_tf->type == TF_TYPE_DISTRIBUTED_POINTS) { in dcn30_set_blend_lut()
84 plane_state->blend_tf, &dpp_base->regamma_params, false); in dcn30_set_blend_lut()
[all …]
|
| /Linux-v6.6/drivers/md/bcache/ |
| D | request.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Main bcache entry point - handle a read or a write request and decide what to
19 #include <linux/backing-dev.h>
30 static unsigned int cache_mode(struct cached_dev *dc) in cache_mode() argument
32 return BDEV_CACHE_MODE(&dc->sb); in cache_mode()
35 static bool verify(struct cached_dev *dc) in verify() argument
37 return dc->verify; in verify()
53 k->ptr[KEY_PTRS(k)] = csum & (~0ULL >> 1); in bio_csum()
62 struct bkey *replace_key = op->replace ? &op->replace_key : NULL; in bch_data_insert_keys()
65 if (!op->replace) in bch_data_insert_keys()
[all …]
|
| /Linux-v6.6/Documentation/driver-api/tty/ |
| D | n_gsm.rst | 10 https://www.3gpp.org/ftp/Specs/archive/07_series/07.10/0710-720.zip
19 ----------------
21 #. Initialize the modem in 0710 mux mode (usually ``AT+CMUX=`` command) through
32 #. Configure DLCs using ``GSMIOC_GETCONF_DLCI``/``GSMIOC_SETCONF_DLCI`` ioctl for non-defaults.
37 (a good starting point is util-linux-ng/sys-utils/ldattach.c)::
50 struct gsm_dlci_config dc;
59 /* send the AT commands to switch the modem to CMUX mode
73 /* use keep-alive once every 5s for modem connection supervision */
88 dc.channel = 1;
89 ioctl(fd, GSMIOC_GETCONF_DLCI, &dc);
[all …]
|
| /Linux-v6.6/drivers/gpu/ipu-v3/ |
| D | ipu-dc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2005-2009 Freescale Semiconductor, Inc.
15 #include <video/imx-ipu-v3.h>
16 #include "ipu-prv.h"
58 #define NULL_WAVE (-1)
90 /* The display interface number assigned to this dc channel */
109 static void dc_link_event(struct ipu_dc *dc, int event, int addr, int priority) in dc_link_event() argument
113 reg = readl(dc->base + DC_RL_CH(event)); in dc_link_event()
116 writel(reg, dc->base + DC_RL_CH(event)); in dc_link_event()
119 static void dc_write_tmpl(struct ipu_dc *dc, int word, u32 opcode, u32 operand, in dc_write_tmpl() argument
[all …]
|
| /Linux-v6.6/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm.c | 30 #include "dc.h"
32 #include "dc/inc/core_types.h"
35 #include "dc/inc/hw/dmcu.h"
36 #include "dc/inc/hw/abm.h"
37 #include "dc/dc_dmub_srv.h"
38 #include "dc/dc_edid_parser.h"
39 #include "dc/dc_stat.h"
155 * **dm**) sits between DRM and DC. It acts as a liaison, converting DRM
156 * requests into DC requests, and DC responses into DRM responses.
164 static bool is_freesync_video_mode(const struct drm_display_mode *mode, struct amdgpu_dm_connector …
[all …]
|
| /Linux-v6.6/drivers/gpu/drm/amd/display/dc/inc/ |
| D | core_types.h | 29 #include "dc.h"
81 struct dc *dc,
85 struct dc *dc, struct dc_state *context,
90 struct dc *dc, struct dc_state *context);
93 * @populate_dml_pipes - Populate pipe data struct
99 struct dc *dc,
111 struct dc *dc,
126 struct dc *dc,
140 struct dc *dc,
145 struct dc *dc,
[all …]
|
| /Linux-v6.6/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_resource.c | 30 #include "dc.h"
746 return &dpp->base; in dcn20_dpp_create()
766 return &ipp->base; in dcn20_ipp_create()
783 return &opp->base; in dcn20_opp_create()
801 ctx->dc->caps.extended_aux_timeout_support); in dcn20_aux_engine_create()
803 return &aux_engine->base; in dcn20_aux_engine_create()
853 return &mpc20->base; in dcn20_mpc_create()
871 struct dcn20_vmid *vmid = &hubbub->vmid[i]; in dcn20_hubbub_create()
873 vmid->ctx = ctx; in dcn20_hubbub_create()
875 vmid->regs = &vmid_regs[i]; in dcn20_hubbub_create()
[all …]
|
| /Linux-v6.6/drivers/iio/dac/ |
| D | ad5755.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * AD5755, AD5755-1, AD5757, AD5735, AD5737 Digital to analog converters driver
128 * struct ad5755_platform_data - AD5755 DAC driver platform data
129 * @ext_dc_dc_compenstation_resistor: Whether an external DC-DC converter
131 * @dc_dc_phase: DC-DC converter phase.
132 * @dc_dc_freq: DC-DC converter frequency.
133 * @dc_dc_maxv: DC-DC maximum allowed boost voltage.
135 * @dac.mode: The mode to be used for the DAC output.
150 enum ad5755_mode mode; member
162 * struct ad5755_chip_info - chip specific information
[all …]
|
| /Linux-v6.6/Documentation/devicetree/bindings/power/supply/ |
| D | qcom,pm8941-charger.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/supply/qcom,pm8941-charger.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Switch-Mode Battery Charger and Boost
10 - Sebastian Reichel <sre@kernel.org>
15 - qcom,pm8226-charger
16 - qcom,pm8941-charger
23 - description: charge done
24 - description: charge fast mode
[all …]
|
| /Linux-v6.6/drivers/gpu/drm/imx/ipuv3/ |
| D | ipuv3-crtc.c | 1 // SPDX-License-Identifier: GPL-2.0+
11 #include <linux/dma-mapping.h>
17 #include <video/imx-ipu-v3.h>
26 #include "imx-drm.h"
27 #include "ipuv3-plane.h"
38 struct ipu_dc *dc; member
53 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent); in ipu_crtc_atomic_enable()
57 ipu_dc_enable_channel(ipu_crtc->dc); in ipu_crtc_atomic_enable()
58 ipu_di_enable(ipu_crtc->di); in ipu_crtc_atomic_enable()
69 if (plane == &ipu_crtc->plane[0]->base) in ipu_crtc_disable_planes()
[all …]
|
| /Linux-v6.6/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_hw_sequencer.c | 63 hws->ctx
65 hws->regs->reg
69 hws->shifts->field_name, hws->masks->field_name
84 const uint32_t ref_clk_mhz = dc_ctx->dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000; in print_microsec()
93 void dcn10_lock_all_pipes(struct dc *dc, in dcn10_lock_all_pipes() argument
102 for (i = 0; i < dc->res_pool->pipe_count; i++) { in dcn10_lock_all_pipes()
103 old_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dcn10_lock_all_pipes()
104 pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn10_lock_all_pipes()
105 tg = pipe_ctx->stream_res.tg; in dcn10_lock_all_pipes()
111 if (pipe_ctx->top_pipe || in dcn10_lock_all_pipes()
[all …]
|
