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/Linux-v5.4/arch/arm/boot/dts/
Domap-zoom-common.dtsi9 ranges = <3 0 0x10000000 0x1000000>, /* CS3: 16MB for UART */
19 reg = <3 0 8>; /* CS3, offset 0, IO size 8 */
55 reg = <3 0x100 8>; /* CS3, offset 0x100, IO size 8 */
66 reg = <3 0x200 8>; /* CS3, offset 0x200, IO size 8 */
77 reg = <3 0x300 8>; /* CS3, offset 0x300, IO size 8 */
Darmada-370-xp.dtsi90 devbus_cs3: devbus-cs3 {
275 <MBUS_ID(0x01, 0xde) 0 0xffffffff>, /* CS3 */
293 <MBUS_ID(0x01, 0xda) 0 0xffffffff>, /* CS3 */
/Linux-v5.4/Documentation/devicetree/bindings/pinctrl/
Dmarvell,armada-38x-pinctrl.txt24 mpp6 6 gpio, ge0(txclkout), ge0(crs), dev(cs3)
32 mpp14 14 gpio, ge0(rxd2), ptp(clk), dram(vttctrl), spi0(cs3), dev(we1), pcie3(clkreq)
45 mpp27 27 gpio, spi0(cs3), ge1(txclkout), i2c1(sda), sd0(d7), dev(cs2)
59 mpp41 41 gpio, ua1(rxd), ge1(rxctl), ua0(cts), spi1(cs3), dev(burst/last), nand(rb0)
Dmarvell,armada-370-pinctrl.txt36 spi0(cs3)
82 mpp56 56 gpio, dev(cs2), uart1(cts), uart0(cts), spi0(cs3),
84 mpp57 57 gpio, dev(cs3), uart1(rxd), tdm(fsync), sata0(prsnt),
Dmarvell,armada-39x-pinctrl.txt24 mpp6 6 gpio, dev(cs3), xsmi(mdio)
46 mpp27 27 gpio, spi0(cs3), i2c1(sda), sd0(d7), dev(cs2), ge(txclkout)
60 mpp41 41 gpio, ua1(rxd), ua0(cts), spi1(cs3), dev(burst/last), nand(rb0), ge(rxctl)
Dmarvell,armada-xp-pinctrl.txt66 mpp43 43 gpio, uart2(txd), uart0(rts), spi0(cs3), pcie(rstout),
67 spi1(cs3)
/Linux-v5.4/drivers/bus/
Dimx-weim.c86 05, /* CS0(128M) CS1(0M) CS2(0M) CS3(0M) */ in imx_weim_gpr_setup()
87 033, /* CS0(64M) CS1(64M) CS2(0M) CS3(0M) */ in imx_weim_gpr_setup()
88 0113, /* CS0(64M) CS1(32M) CS2(32M) CS3(0M) */ in imx_weim_gpr_setup()
89 01111, /* CS0(32M) CS1(32M) CS2(32M) CS3(32M) */ in imx_weim_gpr_setup()
Dqcom-ebi2.c26 * CS0, CS1, CS4 and CS5 are two bits wide, CS2 and CS3 are one bit.
134 /* CS3 */
/Linux-v5.4/arch/arm/mach-sa1100/
Dsimpad.c44 * CS3 support
129 }, { /* Simpad CS3 */
205 /* Initialize CS3 */ in simpad_map_io()
393 printk(KERN_WARNING "simpad: Unable to register cs3 GPIO device"); in simpad_init()
/Linux-v5.4/arch/mips/boot/dts/img/
Dpistachio.dtsi441 spim0_cs3_pin: spim0-cs3-pin {
442 spim0-cs3 {
448 spim0_cs3_alt_pin: spim0-cs3-alt-pin {
449 spim0-cs3 {
533 spim1_cs3_pin: spim1-cs3-pin {
534 spim1-cs3 {
/Linux-v5.4/arch/arm/mach-omap1/
Dboard-h2.c129 /* This is on CS3, wherever it's mapped */
364 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped in h2_init()
369 * put NOR on CS2B and NAND (which on H2 may be 16bit) on CS3. Try in h2_init()
Dboard-h3.c136 /* This is on CS3, wherever it's mapped */
393 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped in h3_init()
398 * (which on H2 may be 16bit) on CS3. Try detecting that in code here, in h3_init()
Dboard-osk.c107 /* this is on CS3, wherever it's mapped */
563 /* Workaround for wrong CS3 (NOR flash) timing in osk_init()
565 * wrong CS3 memory timings. This mainly leads to CRC in osk_init()
/Linux-v5.4/drivers/pinctrl/mvebu/
Dpinctrl-armada-38x.c55 MPP_VAR_FUNCTION(5, "dev", "cs3", V_88F6810_PLUS)),
96 MPP_VAR_FUNCTION(4, "spi0", "cs3", V_88F6810_PLUS),
180 MPP_VAR_FUNCTION(1, "spi0", "cs3", V_88F6810_PLUS),
253 MPP_VAR_FUNCTION(4, "spi1", "cs3", V_88F6810_PLUS),
Dpinctrl-armada-370.c109 MPP_FUNCTION(0x5, "spi0", "cs3")),
306 MPP_FUNCTION(0x4, "spi0", "cs3"),
311 MPP_FUNCTION(0x1, "dev", "cs3"),
Dpinctrl-armada-39x.c53 MPP_VAR_FUNCTION(5, "dev", "cs3", V_88F6920_PLUS),
163 MPP_VAR_FUNCTION(1, "spi0", "cs3", V_88F6920_PLUS),
232 MPP_VAR_FUNCTION(4, "spi1", "cs3", V_88F6920_PLUS),
/Linux-v5.4/arch/m68k/include/asm/
Dm5272sim.h52 #define MCFSIM_CSBR3 (MCF_MBAR + 0x58) /* CS3 Base Address */
53 #define MCFSIM_CSOR3 (MCF_MBAR + 0x5c) /* CS3 Option */
/Linux-v5.4/arch/sh/include/mach-common/mach/
Dsh7785lcr.h15 * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM
/Linux-v5.4/include/linux/platform_data/
Dmtd-davinci.h50 * So, if you have NAND connected to CS3 of DA850, you
/Linux-v5.4/arch/powerpc/boot/dts/
Dmotionpro.dts107 // 8-bit custom Anybus Module on LocalPlus Bus CS3
/Linux-v5.4/drivers/pinctrl/
Dpinctrl-ingenic.c171 INGENIC_PIN_GROUP("nand-cs3", jz4740_nand_cs3),
190 "nand-cs1", "nand-cs2", "nand-cs3", "nand-cs4",
290 INGENIC_PIN_GROUP("nand-cs3", jz4725b_nand_cs3),
312 "nand-cs1", "nand-cs2", "nand-cs3", "nand-cs4",
506 INGENIC_PIN_GROUP("nemc-cs3", jz4760_nemc_cs3),
547 static const char *jz4760_cs3_groups[] = { "nemc-cs3", };
575 { "nemc-cs3", jz4760_cs3_groups, ARRAY_SIZE(jz4760_cs3_groups), },
781 INGENIC_PIN_GROUP("nemc-cs3", jz4770_nemc_cs3),
826 static const char *jz4770_cs3_groups[] = { "nemc-cs3", };
856 { "nemc-cs3", jz4770_cs3_groups, ARRAY_SIZE(jz4770_cs3_groups), },
[all …]
/Linux-v5.4/net/netfilter/
Dxt_u32.c5 * Original author: Don Cohen <don@isis.cs3-inc.com>
/Linux-v5.4/drivers/staging/comedi/drivers/
Dplx9052.h46 #define PLX9052_CNTRL_CS3 BIT(9) /* UIO3 or CS3# select */
/Linux-v5.4/Documentation/devicetree/bindings/spi/
Dspi-orion.txt53 <MBUS_ID(0x01, 0xde) 0 0xffffffff>, /* CS3 */
/Linux-v5.4/arch/mips/include/asm/mach-pmcs-msp71xx/
Dmsp_regs.h238 /* ELB CS3 Configuration Reg */
240 /* ELB CS3 Base Address Reg */
242 /* ELB CS3 Mask Register */
244 /* ELB CS3 access register */
332 /* CS3 Extended address */

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