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/Linux-v5.15/Documentation/devicetree/bindings/iio/proximity/
Dsemtech,sx9310.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Daniel Campello <campello@chromium.org>
16 https://www.semtech.com/products/smart-sensing/sar-sensors/sx9310
21 - semtech,sx9310
22 - semtech,sx9311
34 vdd-supply:
37 svdd-supply:
40 "#io-channel-cells":
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/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dsc7180-trogdor-lazor.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
13 #include "sc7180-trogdor.dtsi"
16 semtech,cs0-ground;
17 semtech,combined-sensors = <3>;
19 semtech,startup-sensor = <0>;
20 semtech,proxraw-strength = <8>;
21 semtech,avg-pos-strength = <64>;
35 clock-frequency = <400000>;
38 compatible = "hid-over-i2c";
40 pinctrl-names = "default";
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/Linux-v5.15/drivers/iio/proximity/
Dsx9310.c1 // SPDX-License-Identifier: GPL-2.0
8 * linux-driver-SX9310_NoSmartHSensing>.
141 /* 4 hardware channels, as defined in STAT0: COMB, CS2, CS1 and CS0. */
216 SX9310_CHANNEL(0), /* CS0 */
262 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%d ", in sx9310_show_samp_freq_avail()
265 buf[len - 1] = '\n'; in sx9310_show_samp_freq_avail()
330 if ((data->chan_read | data->chan_event) != channels) { in sx9310_update_chan_en()
331 ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL0, in sx9310_update_chan_en()
337 data->chan_read = chan_read; in sx9310_update_chan_en()
338 data->chan_event = chan_event; in sx9310_update_chan_en()
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/Linux-v5.15/drivers/spi/
Dspi-zynq-qspi.c1 // SPDX-License-Identifier: GPL-2.0+
18 #include <linux/spi/spi-mem.h>
28 #define ZYNQ_QSPI_TXD_00_00_OFFSET 0x1C /* Transmit 4-byte inst, WO */
29 #define ZYNQ_QSPI_TXD_00_01_OFFSET 0x80 /* Transmit 1-byte inst, WO */
30 #define ZYNQ_QSPI_TXD_00_10_OFFSET 0x84 /* Transmit 2-byte inst, WO */
31 #define ZYNQ_QSPI_TXD_00_11_OFFSET 0x88 /* Transmit 3-byte inst, WO */
57 * QSPI Configuration Register - Baud rate and slave select
121 * struct zynq_qspi - Defines qspi driver instance
151 return readl_relaxed(xqspi->regs + offset); in zynq_qspi_read()
157 writel_relaxed(val, xqspi->regs + offset); in zynq_qspi_write()
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/Linux-v5.15/drivers/pinctrl/
Dpinctrl-gemini.c6 * This is a group-only pin controller.
17 #include <linux/pinctrl/pinconf-generic.h>
22 #include "pinctrl-utils.h"
24 #define DRIVER_NAME "pinctrl-gemini"
27 * struct gemini_pin_conf - information about configuring a pin
39 * struct gemini_pmx - state holder for the gemini pin controller
62 * struct gemini_pin_group - describes a Gemini pin group
65 * from the driver-local pin enumeration space
83 /* Some straight-forward control registers */
96 * - For the bits named *_ENABLE, once you DISABLE something, it simply cannot
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