Searched +full:cru +full:- +full:bus (Results 1 – 25 of 131) sorted by relevance
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/Linux-v6.6/Documentation/devicetree/bindings/mmc/ |
D | snps,dwcmshc-sdhci.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ulf Hansson <ulf.hansson@linaro.org> 11 - Jisheng Zhang <Jisheng.Zhang@synaptics.com> 14 - $ref: mmc-controller.yaml# 19 - rockchip,rk3568-dwcmshc 20 - rockchip,rk3588-dwcmshc 21 - snps,dwcmshc-sdhci [all …]
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/Linux-v6.6/arch/arm/boot/dts/rockchip/ |
D | rk3066a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3066a-cru.h> 10 #include <dt-bindings/power/rk3066-power.h> 17 #address-cells = <1>; 18 #size-cells = <0>; 19 enable-method = "rockchip,rk3066-smp"; 23 compatible = "arm,cortex-a9"; 24 next-level-cache = <&L2>; [all …]
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D | rk3188.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3188-cru.h> 10 #include <dt-bindings/power/rk3188-power.h> 17 #address-cells = <1>; 18 #size-cells = <0>; 19 enable-method = "rockchip,rk3066-smp"; 23 compatible = "arm,cortex-a9"; 24 next-level-cache = <&L2>; [all …]
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D | rk3036.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3036-cru.h> 8 #include <dt-bindings/soc/rockchip,boot-mode.h> 9 #include <dt-bindings/power/rk3036-power.h> 12 #address-cells = <1>; 13 #size-cells = <1>; [all …]
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D | rk322x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3228-cru.h> 8 #include <dt-bindings/thermal/thermal.h> 9 #include <dt-bindings/power/rk3228-power.h> 12 #address-cells = <1>; 13 #size-cells = <1>; [all …]
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/Linux-v6.6/drivers/media/platform/renesas/rzg2l-cru/ |
D | rzg2l-video.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Driver for Renesas RZ/G2L CRU 7 * Based on Renesas R-Car VIN 9 * Copyright (C) 2011-2013 Renesas Solutions Corp. 18 #include <media/v4l2-ioctl.h> 19 #include <media/videobuf2-dma-contig.h> 21 #include "rzg2l-cru.h" 23 /* HW CRU Registers Definition */ 25 /* CRU Control Register */ 29 /* CRU Interrupt Enable Register */ [all …]
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/Linux-v6.6/arch/arm64/boot/dts/rockchip/ |
D | rk3588.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "rk3588-pinctrl.dtsi" 11 compatible = "rockchip,rk3588-pcie3-phy-grf", "syscon"; 16 compatible = "rockchip,rk3588-pipe-phy-grf", "syscon"; 21 compatible = "rockchip,rk3588-i2s-tdm"; 24 clocks = <&cru MCLK_I2S8_8CH_TX>, <&cru MCLK_I2S8_8CH_TX>, <&cru HCLK_I2S8_8CH>; 25 clock-names = "mclk_tx", "mclk_rx", "hclk"; 26 assigned-clocks = <&cru CLK_I2S8_8CH_TX_SRC>; 27 assigned-clock-parents = <&cru PLL_AUPLL>; 29 dma-names = "tx"; [all …]
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D | rk3568.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 12 compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; 14 clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>, 15 <&cru CLK_SATA0_RXOOB>; 16 clock-names = "sata", "pmalive", "rxoob"; 19 phy-names = "sata-phy"; 20 ports-implemented = <0x1>; 21 power-domains = <&power RK3568_PD_PIPE>; 26 compatible = "rockchip,rk3568-pipe-phy-grf", "syscon"; 31 compatible = "rockchip,rk3568-qos", "syscon"; [all …]
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D | rk3399.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3399-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3399-power.h> 12 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; [all …]
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D | rk3568-fastrhino-r68s.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 #include "rk3568-fastrhino-r66s.dtsi" 7 compatible = "lunzn,fastrhino-r68s", "rockchip,rk3568"; 15 adc-keys { 16 compatible = "adc-keys"; 17 io-channels = <&saradc 0>; 18 io-channel-names = "buttons"; 19 keyup-threshold-microvolt = <1800000>; 21 button-recovery { 24 press-threshold-microvolt = <1750>; [all …]
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D | rk3566-radxa-cm3-io.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/soc/rockchip,vop2.h> 10 #include "rk3566-radxa-cm3.dtsi" 14 compatible = "radxa,cm3-io", "radxa,cm3", "rockchip,rk3566"; 21 stdout-path = "serial2:1500000n8"; 24 gmac1_clkin: external-gmac1-clock { 25 compatible = "fixed-clock"; 26 clock-frequency = <125000000>; 27 clock-output-names = "gmac1_clkin"; [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/pci/ |
D | rockchip,rk3399-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Lin <shawn.lin@rock-chips.com> 13 - $ref: /schemas/pci/pci-bus.yaml# 14 - $ref: rockchip,rk3399-pcie-common.yaml# 18 const: rockchip,rk3399-pcie 22 reg-names: 24 - const: axi-base [all …]
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D | rockchip,rk3399-pcie-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie-ep.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Lin <shawn.lin@rock-chips.com> 13 - $ref: /schemas/pci/pci-ep.yaml# 14 - $ref: rockchip,rk3399-pcie-common.yaml# 18 const: rockchip,rk3399-pcie-ep 22 reg-names: 24 - const: apb-base [all …]
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D | rockchip-dw-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/rockchip-dw-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Lin <shawn.lin@rock-chips.com> 11 - Simon Xue <xxm@rock-chips.com> 12 - Heiko Stuebner <heiko@sntech.de> 17 snps,dw-pcie.yaml. 20 - $ref: /schemas/pci/snps,dw-pcie.yaml# 25 - const: rockchip,rk3568-pcie [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/sound/ |
D | rockchip,i2s-tdm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 15 - Nicolas Frattaroli <frattaroli.nicolas@gmail.com> 18 - $ref: dai-common.yaml# 23 - rockchip,px30-i2s-tdm 24 - rockchip,rk1808-i2s-tdm 25 - rockchip,rk3308-i2s-tdm 26 - rockchip,rk3568-i2s-tdm [all …]
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D | rockchip-i2s.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 The I2S bus (Inter-IC sound bus) is a serial link for digital 14 - Heiko Stuebner <heiko@sntech.de> 17 - $ref: dai-common.yaml# 22 - const: rockchip,rk3066-i2s 23 - items: 24 - enum: [all …]
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D | rockchip,pdm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 17 - Heiko Stuebner <heiko@sntech.de> 20 - $ref: dai-common.yaml# 25 - rockchip,pdm 26 - rockchip,px30-pdm 27 - rockchip,rk1808-pdm 28 - rockchip,rk3308-pdm 29 - rockchip,rk3568-pdm [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/media/ |
D | rockchip-isp1.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 --- 4 $id: http://devicetree.org/schemas/media/rockchip-isp1.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Helen Koike <helen.koike@collabora.com> 19 - rockchip,px30-cif-isp 20 - rockchip,rk3399-cif-isp 29 interrupt-names: 31 - const: isp 32 - const: mi [all …]
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D | renesas,rzg2l-cru.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/renesas,rzg2l-cru.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Renesas RZ/G2L (and alike SoC's) Camera Data Receiving Unit (CRU) Image processing 11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> 14 The CRU image processing module is a data conversion module equipped with pixel 15 color space conversion, LUT, pixel format conversion, etc. An MIPI CSI-2 input and 16 parallel (including ITU-R BT.656) input are provided as the image sensor interface. 21 - enum: [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/usb/ |
D | rockchip,rk3399-dwc3.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/usb/rockchip,rk3399-dwc3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 14 const: rockchip,rk3399-dwc3 16 '#address-cells': 19 '#size-cells': 26 - description: 28 - description: [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/display/rockchip/ |
D | rockchip-vop2.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 15 - Sandy Huang <hjc@rock-chips.com> 16 - Heiko Stuebner <heiko@sntech.de> 21 - rockchip,rk3566-vop 22 - rockchip,rk3568-vop 26 - description: 29 - description: [all …]
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D | rockchip-vop.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 15 - Sandy Huang <hjc@rock-chips.com> 16 - Heiko Stuebner <heiko@sntech.de> 21 - rockchip,px30-vop-big 22 - rockchip,px30-vop-lit 23 - rockchip,rk3036-vop 24 - rockchip,rk3066-vop [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/spi/ |
D | rockchip-sfc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/rockchip-sfc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 11 - Chris Morgan <macromorgan@hotmail.com> 14 - $ref: spi-controller.yaml# 32 - description: Bus Clock 33 - description: Module Clock 35 clock-names: [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/mfd/ |
D | brcm,cru.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mfd/brcm,cru.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom CRU 10 - Rafał Miłecki <rafal@milecki.pl> 13 Broadcom CRU ("Clock and Reset Unit" or "Central Resource Unit") is a hardware 20 - enum: 21 - brcm,ns-cru 22 - const: simple-mfd [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/phy/ |
D | rockchip-mipi-dphy-rx0.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 --- 4 $id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx0.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip SoC MIPI RX0 D-PHY 10 - Helen Koike <helen.koike@collabora.com> 11 - Ezequiel Garcia <ezequiel@collabora.com> 14 The Rockchip SoC has a MIPI D-PHY bus with an RX0 entry which connects to 19 const: rockchip,rk3399-mipi-dphy-rx0 23 - description: MIPI D-PHY ref clock [all …]
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