Searched +full:cros +full:- +full:ec +full:- +full:pwm (Results 1 – 21 of 21) sorted by relevance
/Linux-v5.10/Documentation/devicetree/bindings/pwm/ |
D | google,cros-ec-pwm.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/pwm/google,cros-ec-pwm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: PWM controlled by ChromeOS EC 10 - Thierry Reding <thierry.reding@gmail.com> 11 - '"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>' 14 Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller 15 (EC) and controlled via a host-command interface. 16 An EC PWM node should be only found as a sub-node of the EC node (see [all …]
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/Linux-v5.10/Documentation/devicetree/bindings/mfd/ |
D | google,cros-ec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mfd/google,cros-ec.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Benson Leung <bleung@chromium.org> 11 - Enric Balletbo i Serra <enric.balletbo@collabora.com> 12 - Guenter Roeck <groeck@chromium.org> 15 Google's ChromeOS EC is a microcontroller which talks to the AP and 17 The EC can be connected through various interfaces (I2C, SPI, and others) 23 - description: [all …]
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/Linux-v5.10/drivers/pwm/ |
D | pwm-cros-ec.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Expose a PWM controlled by the ChromeOS EC to the host processor. 12 #include <linux/pwm.h> 16 * struct cros_ec_pwm_device - Driver data for EC PWM 19 * @ec: Pointer to EC device 20 * @chip: PWM controller chip 24 struct cros_ec_device *ec; member 29 * struct cros_ec_pwm - per-PWM driver data 41 static int cros_ec_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) in cros_ec_pwm_request() argument 47 return -ENOMEM; in cros_ec_pwm_request() [all …]
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D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_PWM) += core.o 3 obj-$(CONFIG_PWM_SYSFS) += sysfs.o 4 obj-$(CONFIG_PWM_AB8500) += pwm-ab8500.o 5 obj-$(CONFIG_PWM_ATMEL) += pwm-atmel.o 6 obj-$(CONFIG_PWM_ATMEL_HLCDC_PWM) += pwm-atmel-hlcdc.o 7 obj-$(CONFIG_PWM_ATMEL_TCB) += pwm-atmel-tcb.o 8 obj-$(CONFIG_PWM_BCM_IPROC) += pwm-bcm-iproc.o 9 obj-$(CONFIG_PWM_BCM_KONA) += pwm-bcm-kona.o 10 obj-$(CONFIG_PWM_BCM2835) += pwm-bcm2835.o [all …]
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/Linux-v5.10/arch/arm64/boot/dts/rockchip/ |
D | rk3399-gru.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Copyright 2016-2017 Google, Inc 8 #include <dt-bindings/input/input.h> 10 #include "rk3399-op1-opp.dtsi" 14 stdout-path = "serial2:115200n8"; 23 * - Rails that only connect to the EC (or devices that the EC talks to) 25 * - Rails _are_ included if the rails go to the AP even if the AP 34 * - The EC controls the enable and the EC always enables a rail as 36 * - The rails are actually connected to each other by a jumper and 41 ppvar_sys: ppvar-sys { [all …]
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D | rk3399-gru-chromebook.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Google Gru-Chromebook shared properties 8 #include "rk3399-gru.dtsi" 11 pp900_ap: pp900-ap { 12 compatible = "regulator-fixed"; 13 regulator-name = "pp900_ap"; 15 /* EC turns on w/ pp900_ap_en; always on for AP */ 16 regulator-always-on; 17 regulator-boot-on; 18 regulator-min-microvolt = <900000>; [all …]
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/Linux-v5.10/arch/arm64/boot/dts/qcom/ |
D | sc7180-trogdor.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 23 /delete-node/ &hyp_mem; 24 /delete-node/ &xbl_mem; 25 /delete-node/ &aop_mem; 26 /delete-node/ &sec_apps_mem; 27 /delete-node/ &tz_mem; 35 reserved-memory { [all …]
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D | sdm845-cheza.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 26 stdout-path = "serial0:115200n8"; 30 compatible = "pwm-backlight"; 32 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>; 33 power-supply = <&ppvar_sys>; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&ap_edp_bklten>; [all …]
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/Linux-v5.10/arch/arm/boot/dts/ |
D | tegra124-nyan.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 13 stdout-path = "serial0:115200n8"; 19 * missing a unit-address. However, the bootloader on these Chromebook 21 * Adding the unit-address causes the bootloader to create a /memory 33 /delete-node/ memory@80000000; 39 vdd-supply = <&vdd_3v3_hdmi>; 40 pll-supply = <&vdd_hdmi_pll>; 41 hdmi-supply = <&vdd_5v0_hdmi>; 43 nvidia,ddc-i2c-bus = <&hdmi_ddc>; [all …]
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D | exynos5420-peach-pit.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/clock/maxim,max77802.h> 13 #include <dt-bindings/regulator/maxim,max77802.h> 14 #include <dt-bindings/sound/samsung-i2s.h> 16 #include "exynos5420-cpus.dtsi" 21 compatible = "google,pit-rev16", [all …]
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D | exynos5800-peach-pi.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/clock/maxim,max77802.h> 13 #include <dt-bindings/regulator/maxim,max77802.h> 14 #include <dt-bindings/sound/samsung-i2s.h> 16 #include "exynos5420-cpus.dtsi" 21 compatible = "google,pi-rev16", [all …]
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D | tegra124-venice2.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 18 stdout-path = "serial0:115200n8"; 29 vdd-supply = <&vdd_3v3_hdmi>; 30 pll-supply = <&vdd_hdmi_pll>; 31 hdmi-supply = <&vdd_5v0_hdmi>; 33 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 34 nvidia,hpd-gpio = 41 avdd-io-hdmi-dp-supply = <&vdd_1v05_run>; [all …]
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D | rk3288-veyron-jaq.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "rk3288-veyron-chromebook.dtsi" 11 #include "cros-ec-sbs.dtsi" 15 compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4", 16 "google,veyron-jaq-rev3", "google,veyron-jaq-rev2", 17 "google,veyron-jaq-rev1", "google,veyron-jaq", 22 /* Jaq panel PWM must be >= 3%, so start non-zero brightness at 8 */ 23 brightness-levels = <0 8 255>; 24 num-interpolated-steps = <247>; [all …]
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D | exynos5250-snow-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/maxim,max77686.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/sound/samsung-i2s.h> 27 stdout-path = "serial3:115200n8"; 30 gpio-keys { 31 compatible = "gpio-keys"; 32 pinctrl-names = "default"; [all …]
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/Linux-v5.10/arch/arm64/boot/dts/nvidia/ |
D | tegra132-norrin.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 18 stdout-path = "serial0:115200n8"; 30 vdd-supply = <&vdd_3v3_hdmi>; 31 pll-supply = <&vdd_hdmi_pll>; 32 hdmi-supply = <&vdd_5v0_hdmi>; 34 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 35 nvidia,hpd-gpio = 42 avdd-io-hdmi-dp-supply = <&vdd_3v3_hdmi>; [all …]
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/Linux-v5.10/arch/arm64/boot/dts/mediatek/ |
D | mt8173-elm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/regulator/dlg,da9211-regulator.h> 9 #include <dt-bindings/gpio/gpio.h> 19 compatible = "pwm-backlight"; 21 power-supply = <&bl_fixed_reg>; 22 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>; 24 pinctrl-names = "default"; 25 pinctrl-0 = <&disp_pwm0_pins>; [all …]
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/Linux-v5.10/drivers/regulator/ |
D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 7 obj-$(CONFIG_REGULATOR) += core.o dummy.o fixed-helper.o helpers.o devres.o 8 obj-$(CONFIG_OF) += of_regulator.o 9 obj-$(CONFIG_REGULATOR_FIXED_VOLTAGE) += fixed.o 10 obj-$(CONFIG_REGULATOR_VIRTUAL_CONSUMER) += virtual.o 11 obj-$(CONFIG_REGULATOR_USERSPACE_CONSUMER) += userspace-consumer.o 13 obj-$(CONFIG_REGULATOR_88PG86X) += 88pg86x.o 14 obj-$(CONFIG_REGULATOR_88PM800) += 88pm800-regulator.o 15 obj-$(CONFIG_REGULATOR_88PM8607) += 88pm8607.o 16 obj-$(CONFIG_REGULATOR_CROS_EC) += cros-ec-regulator.o [all …]
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D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 38 managed regulators and simple non-configurable regulators. 65 They provide two I2C-controlled DC/DC step-down converters with 85 tristate "Active-semi act8865 voltage regulator" 90 This driver controls a active-semi act8865 voltage output 94 tristate "Active-semi ACT8945A voltage regulator" 97 This driver controls a active-semi ACT8945A voltage regulator 98 via I2C bus. The ACT8945A features three step-down DC/DC converters 99 and four low-dropout linear regulators, along with a ActivePath 110 tristate "Freescale i.MX on-chip ANATOP LDO regulators" [all …]
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/Linux-v5.10/include/linux/platform_data/ |
D | cros_ec_commands.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Host communication command constants for ChromeOS EC 7 * NOTE: This file is auto-generated from ChromeOS EC Open Source code from 8 * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h 11 /* Host communication command constants for Chrome EC */ 52 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff 59 /* EC command register bit functions */ 61 #define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */ 62 #define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */ 73 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */ [all …]
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/Linux-v5.10/drivers/mfd/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 44 tristate "Active-semi ACT8945A" 49 Support for the ACT8945A PMIC from Active-semi. This device 50 features three step-down DC/DC converters and four low-dropout 66 sun4i-gpadc-iio and the hwmon driver iio_hwmon. 69 called sun4i-gpadc. 88 tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down 119 over at91-usart-serial driver and usart-spi-driver. Only one function 135 tristate "Atmel HLCDC (High-end LCD Controller)" 172 tristate "X-Powers AC100" [all …]
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/Linux-v5.10/ |
D | MAINTAINERS | 9 ------------------------- 30 ``diff -u`` to make the patch easy to merge. Be prepared to get your 40 See Documentation/process/coding-style.rst for guidance here. 46 See Documentation/process/submitting-patches.rst for details. 57 include a Signed-off-by: line. The current version of this 59 Documentation/process/submitting-patches.rst. 70 that the bug would present a short-term risk to other users if it 76 Documentation/admin-guide/security-bugs.rst for details. 81 --------------------------------------------------- 97 W: *Web-page* with status/info [all …]
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